B. C. Chakravarty

A novel method for the determination of the front contact resistance in large area screen printed silicon solar cells

The contact resistance at the interface of the semiconductor (Si)/metal (Ag) contact in a solar cell is generally small because it is made on a heavily doped silicon surface. In the case of large area terrestrial silicon solar cells contact is made by screen printing silver paste which has pores even after baking and sintering. Therefore the entire area is not active and the contact resistance is not entirely negligible. This paper describes the use of a simple method for the measurement of contact resistance of the front grid in a large area silicon solar cell based on the application of three-point probes using the existing fixed equidistant grid fingers of the solar cell. In addition, the value of the sheet resistivity is obtained from the measurement and is compared with that measured by the standard four-point probe method on different samples. The power losses due to current travelling through different resistive elements in the solar cell were obtained by using the standard formulae. The calculations show that power loss due to contact resistance is a small part of the total power loss. The total power loss agrees with that determined from the illuminated I -V characteristics of the solar cell.

Effect of annealing on resistivity and photoconductivity of solar‐grade polycrystalline silicon and on solar‐cell performance

The effect of annealing on the restistivity and photoconductivity of solar‐grade polycrystalline silicon of grain size 100–1200 μm has been examined in the temperature range 900‐1100 °C. Both resistivity and photoconductivity strongly depend on the temperature of annealing and grain size. The atmosphere in which annealing takes place, e.g., air, nitrogen, argon, or vacuum does not seem to have any effect on the results. Heat cycling of the starting material causes a reduction in the short‐circuit current of the solar cell.

Application of photoconductivity decay and photocurrent generation methods for determination of minority carrier lifetime in silicon

Minority carrier lifeline, τ, is one of the most important parameters which has a decisive effect on the performance of silicon devices based on excess carriers. The value of τ is greatly affected by the presence of impurities and defects in silicon and its value provides a fair indication of quality of the material. Photoconductivity decay (PCD) and photocurrent generation (PCG) methods are simple and low cost methods of measurement of minority carrier lifetime in silicon wafers. However, their application requires care. The PCD method can give quite misleading results in case of polycrystalline wafers if there exists potential barriers at the grain boundaries which may affect majority carrier mobility significantly. PCG needs creation of an inducedp+-p-n+ structure of substantially good quality that should not degrade with time. For PCG method the T measurement under vacuum conditions provides correct and consistent results.

Determination of minority‐carrier diffusion length in a p‐silicon wafer by photocurrent generation method

A nondestructive method to determine the diffusion length of minority carriers in a p‐silicon wafer is outlined. This novel method is based on creating an accumulation layer on one side and an inversion layer on the other side of the wafer by depositing thin semitransparent layers of high (e.g., palladium) and low (e.g., aluminum) workfunction metals, respectively. The wafer acquires a structure akin to p+‐p‐n+ and is capable of generating a photocurrent when illuminated. The photocurrent Isc (where sc represents short circuit) as a function of the intensity Pin of a monochromatic radiation incident on the accumulation layer (p+) side of the wafer is measured. The diffusion length L is determined from the slope of the Jsc vs Pin curve. The values of L so determined were compared with that determined from the measurement of spectral response by illuminating the wafer from the inversion layer (n+) side and were found to be in excellent agreement.

Growth kinetics of thin anodic oxides of silicon and its dependence on phosphorus concentration in silicon

Abstract A model has been proposed to study the growth kinetics of thin (no more than 300 A thick) oxides of silicon, anodically grown at constant voltage by using ethylene glycol +0.04 N NH4NO3 as the electrolyte. The thickness of oxide is found to vary linearly with applied voltage at a rate of 6 A V−1 for a phosphorus concentration in silicon of 1 × 1015 atoms cm−3 which decreases to 5.5 A V-1 and 5 A V−1 for a phosphorus concentration of 8 × 1020 atoms cm−3 and 1.3 × 1021 atoms cm−3 respectively. The dependence of the rate of oxidation and other rate constants on phosphorus concentration in silicon have also been studied.

Process development for large-area terrestrial solar cells with-out optical confinement

In this letter a simple processing sequence is established to achieve large area solar cells in the efficiency range 8-9%