B. Checcucci

Use of FPGA embedded processors for fast cluster reconstruction in the NA62 liquid krypton electromagnetic calorimeter

The goal of the NA62 experiment at the CERN SPS is the measurement of the Branching Ratio of the very rare kaon decay K+??+??? with a 10% accuracy by collecting 100 events in two years of data taking. An efficient photon veto system is needed to reject the K+??+??0 background and a liquid krypton electromagnetic calorimeter will be used for this purpose in the 1-10 mrad angular region. The L0 trigger system for the calorimeter consists of a peak reconstruction algorithm implemented on FPGA by using a mixed parallel architecture based on soft core Altera NIOS II embedded processors together with custom VHDL modules. This solution allows an efficient and flexible reconstruction of the energy-deposition peak. The system will be totally composed of 36 TEL62 boards, 108 mezzanine cards and 215 high-performance FPGAs. We describe the design, current status and the results of the first performance tests.

First operation of the level-0 trigger of the NA62 liquid krypton calorimeter

The NA62 experiment at CERN Super Proton Synchrotron aims at studying ultra-rare decays of charged kaons for precise tests of the Standard Model. The complete experimental setup is being commissioned for the first physics data taking in the autumn of 2014. This paper presents the final design and implementation of the Level-0 trigger system of the LKr calorimeter, acting as hermetic photon veto of the experiment in the 1-8.5 mrad region. The first on-field performance tests are presented.

The Level-0 calorimetric trigger of the NA62 experiment

The NA62 experiment at the CERN SPS aims at measuring the branching ratio of the very rare kaon decay K+ → π+ ν (expected 10−10) with a 10% background. Since an high-intensity kaon beam is required to collect enough statistics, the Level-0 trigger plays a fundamental role in both the background rejection and in the particle identification. The calorimetric trigger collects data from various calorimeters and it is able to identify clusters of energy deposit and determine their position, fine-time and energy. This paper describes the complete hardware commisioning and the setup of the trigger for the 2015 physics data taking.

The Level 0 trigger processor of the NA62 liquid krypton electromagnetic calorimeter

The NA62 experiment at the CERN SPS aims to measure the Branching Ratio of the ultra-rare decay K+ → π+ νν̅, collecting about 100 events in two years of data taking with a signal to background ratio of 10:1. An hermetic photon veto system has been designed to efficiently reject the pi0 background, one of the main background sources, and the 20-ton liquid krypton calorimeter is a fundamental component of such system in the angular acceptance region 1-10 mrad. We present the design of the Level 0 trigger processor that identifies electromagnetic clusters in the calorimeter providing information on time, position and energy reconstruction for each cluster. It is composed of 36 readout boards (TEL62), organized in a three layer parallel system, 108 mezzanines and 215 high-performance FPGAs. It is designed to sustain an instantaneous hit rate of 30 MHz, to process data with a latency of about 100 μs, and to achieve a time resolution of 1.5 ns on the single cluster. Updated production and functionality test results of a trigger slice are presented.

Performance and advantages of a soft-core based parallel architecture for energy peak detection in the calorimeter Level 0 trigger for the NA62 experiment at CERN

The NA62 experiment at CERN SPS has started its data-taking. Its aim is to measure the branching ratio of the ultra-rare decay K+ → π+ν ν . In this context, rejecting the background is a crucial topic. One of the main background to the measurement is represented by the K+ → π+π0 decay. In the 1-8.5 mrad decay region this background is rejected by the calorimetric trigger processor (Cal-L0). In this work we present the performance of a soft-core based parallel architecture built on FPGAs for the energy peak reconstruction as an alternative to an implementation completely founded on VHDL language.

Fast cluster reconstruction in the NA62 Liquid Krypton electromagnetic calorimeter by using soft core embedded processors in FPGA

The NA62 experiment at CERN SPS aims to increase the precision in the measure of the Branching Ratio of the K⁺ → π⁺vv̅ decay. Efficient veto systems are needed to achieve the required background suppression level. The LKr, covering the angular range 1-10 mrad, is part of system vetoing photons due to π⁰ decay (from K⁺ → π + π⁰). This paper deals with the implementation of the LKr L0 trigger peak reconstruction algorithm on FPGA by using a mixed architecture based on soft core embedded processors together with custom VHDL modules. This solution allows an efficient and flexible reconstruction of the energy-deposition peak.