B. De Smedt

WATSON: design space boundary exploration and model generation for analog and RFIC design

A new method is described which gives the designer access to the design space boundaries of a circuit topology, all with transistor-level accuracy. Using multiobjective genetic optimization, the hypersurface of Pareto-optimal design points is calculated. Tradeoff analysis of competing performances at the design space boundaries is made possible by the application of multivariate regression techniques. This new methodology is illustrated with the presentation of the design space for two different types of circuits: a Miller-compensated operational transconductance amplifier and an LC-tank voltage-controlled oscillator.

Format-dependent representations of symbolic and non-symbolic numbers in the human cortex as revealed by multi-voxel pattern analyses.

Neuroimaging studies in the last 20 years have tried to unravel the neural correlates of number processing across formats in humans and non-human primates. Results point to the intraparietal sulcus as the core area for an abstract representation of numerical quantity. On the other hand, there exist a variety of behavioral and neuroimaging data that are difficult to reconcile with the existence of such an abstract representation. In this study, we addressed this issue by applying multi-voxel pattern analysis (MVPA) to functional Magnetic Resonance Imaging (fMRI) data to unravel the neural representations of symbolic (digits) and non-symbolic (dots) numbers and their possible overlap on three different spatial scales (entire lobules, smaller regions of interest and a searchlight analysis with 2-voxel radius). Results showed that numbers in both formats are decodable in occipital, frontal, temporal and parietal regions. However, there were no overlapping representations between dots and digits on any of the spatial scales. These data suggest that the human brain does not contain an abstract representation of numerical magnitude.

Neural networks for short-term memory for order differentiate high and low proficiency bilinguals

Short-term memory (STM) for order information, as compared to STM for item information, has been shown to be a critical determinant of language learning capacity. The present fMRI study asked whether the neural substrates of order STM can serve as markers for bilingual language achievement. Two groups of German-French bilinguals differing in second language proficiency were presented STM tasks probing serial order or item information. During order STM but not item STM tasks, the high proficiency group showed increased activation in the lateral orbito-frontal and the superior frontal gyri associated with updating and grouped rehearsal of serial order information. Functional connectivity analyses for order encoding showed a functional network involving the left IPS, the right IPS and the right superior cerebellum in the high proficiency group while the low proficiency group showed enhanced connectivity between the left IPS and bilateral superior temporal and temporo-parietal areas involved in item processing. The present data suggest that low proficiency bilinguals activate STM networks for order in a less efficient and differentiated way, and this may explain their poorer storage and learning capacity for verbal sequences.

Mathematical disabilities in children with velo-cardio-facial syndrome

Current neurocognitive theories of number processing [Dehaene, S., Piazza, M., Pinel, P., & Cohen, L. (2003). Three parietal circuits for number processing. Cognitive Neuropsychology, 20, 487-506] state that mathematical performance is made possible by two functionally and anatomically distinct subsystems of number processing: a verbal system located in the angular gyrus, which underlies the retrieval of arithmetic facts, and a quantity system located in the intraparietal sulcus, which subserves operations that involve semantic manipulations of quantity. According to this model, subtypes of math disability (MD) should be traceable to differential impairments in these subsystems. The present study investigated MD in children with velo-cardio-facial syndrome (VCFS) and aimed to verify which of these subsystems of number processing is impaired in these children. Eleven children with VCFS and 11 individually matched controls, selected from the same classes, completed a large battery of mathematical tests. Our data revealed that children with VCFS had preserved number reading abilities and preserved retrieval of arithmetic facts, both of which indicate that the verbal subsystem is not impaired in VCFS. By contrast, children with VCFS showed difficulties in number comparison, the execution of a calculation strategy and word problem solving, all of which involve the semantic manipulation of quantities. This provides evidence for a specific deficit in the quantity subsystem in children with VCFS, suggesting underlying abnormalities in the intraparietal sulcus.

PeopleMover: an example of interdisciplinary project-based education in electrical engineering

In this paper, the authors present an interdisciplinary design project that was introduced into the electrical engineering curriculum as an example of project-based education. Within the project, students design and implement an autonomous rail system intended for people transportation from system specifications down to a fully working system including hardware and software. The educational assets and drawbacks are discussed as well as the practical issues of setting up a large educational project. The current state of the project and an overview of future improvements based on student feedback are highlighted as well.

HOLMES: Capturing the Yield-Optimized Design Space Boundaries of Analog and RF Integrated Circuits

A novel methodology is presented to structured yield-aware synthesis. The trade-off between yield and the unspecified performances is explored along the design space boundaries, while respecting specifications on the other performances. Through the unique combination of multi-objective evolutionary optimization techniques, multi-variate regression modeling and sensitivity-based yield estimation, the designer is given access to this trade-off, all within transistor-level accuracy. Even more, a large reduction in required computer resources is obtained compared to alternative approaches.

Models for systematic design and verification of frequency synthesizers

Recently, much effort has been put on the integration of telecommunication front-ends. For a semiconductor company to follow the large market request in shortening the time-to-market constraint for new products, a systematic design methodology has to be followed, starting from a top-down design followed by a bottom-up verification. This paper provides, in models, each of these design phases for the example of frequency synthesizers. During the design phase, fast models are needed to explore the design space. On the other hand, accurate nonlinear models are derived for the verification phase to simulate complex specifications, e.g., the oscillators output phase noise. An illustration of these models is based on the design of a 1.8 GHz CMOS frequency synthesizer.

Nonlinear behavioral modeling and phase noise evaluation in phase locked loops

In this paper, a method is proposed for evaluating the phase noise spectrum of phase locked loops. Reliable loop simulations are based on a highly-accurate behavioral model for the voltage controlled oscillator. A verification is performed between the output spectrum of the VCO model and the transistor-level VCO spectrum as a function of the applied input voltage. This yields an accuracy better than 0.25 dBc/Hz. The phase noise spectrum of a phase locked loop is calculated. Simulation results are presented and compared with measurements.

Modeling and simulation of a sigma-delta digital to analog converter using VHDL-AMS

Sigma-Delta digital to analog converters are less vulnerable to circuit imperfections than their A/D counterparts because they have their noise-shaping loop all in the digital domain. Still the analog part of the system (basically a low-pass filter) can degrade the overall performance, especially in the case of multi-bit converters. This paper presents a way of identifying and simulating the major noise and harmonics contributions of the system using VHDL-AMS. The resulting system-level model can be used to explore different architectures in the digital domain and to determine the specifications of the different building blocks.

Individual differences in children's mathematics achievement: The roles of symbolic numerical magnitude processing and domain-general cognitive functions

This contribution reviewed the available evidence on the domain-specific and domain-general neurocognitive determinants of childrens arithmetic development, other than nonsymbolic numerical magnitude processing, which might have been overemphasized as a core factor of individual differences in mathematics and dyscalculia. We focused on symbolic numerical magnitude processing, working memory, and phonological processing, as these determinants have been most researched and their roles in arithmetic can be predicted against the background of brain imaging data. Our review indicates that symbolic numerical magnitude processing is a major determinant of individual differences in arithmetic. Working memory, particularly the central executive, also plays a role in learning arithmetic, but its influence appears to be dependent on the learning stage and experience of children. The available evidence on phonological processing suggests that it plays a more subtle role in childrens acquisition of arithmetic facts. Future longitudinal studies should investigate these factors in concert to understand their relative contribution as well as their mediating and moderating roles in childrens arithmetic development.