Baback A. Izadi

Energy aware scheduling for DAG structured applications on heterogeneous and DVS enabled processors

The trend towards ever more powerful and faster processors has led to an enormous increase in power consumption. This paper focuses on scheduling tasks in a heterogeneous environment with DVS enabled processors to minimize both execution time and energy consumed. The proposed algorithm, called Energy-Dynamic Level Scheduling (EDLS), favors low-energy consuming processors by introducing a cost factor that affects scheduling decisions. Our scheme allows for trade offs between energy consumption and the desired performance. Our simulation results exhibit significant power savings at a reasonable increase in overall execution time. Moreover, our results demonstrates a high degree of correlation between the energy saving and the increase in the heterogeneity of processors.

Enhanced cluster k-ary n-cube, a fault-tolerant multiprocessor

We present a strongly fault-tolerant design for the k-ary n-cube multiprocessor and examine its reconfigurability. Our design augments the k-ary n-cube with (k/j)/sup n/ spare nodes. Each set of j/sup n/ regular nodes is connected to a spare node and the spare nodes are interconnected as either a (k/j)-ary n-cube if j/spl ne/(k/2) or a hypercube of dimension n if j=k/2. Our approach utilizes the capabilities of the wave-switching communication modules of the spare nodes to tolerate a large number of faulty nodes. Both theoretical and experimental results are examined. Compared with other proposed schemes, our approach can tolerate significantly more faulty nodes with a low overhead and no performance degradation.

Spare Allocation and Reconfiguration in a Fault Tolerant Hypercube with Direct Connect Capability

This paper investigates hardware reconjiguratzon schemes to make the hypercube multicomputer fault tolerant. Two schemes are proposed; the Cluster Approach and the Enhanced Cluster Approach. The approaches are shown to be able to tolerate large number of failures without any performance deg,radation. It is further demonstrated that no modification to either the existing communication or computaitional algorithm is needed. Finally a gracefully degmdable approach is presented to reconfigure when the number of faulty nodes are more than the available spares.

Design of a circuit-switched highly fault-tolerant k-ary n-cube

In this paper we present a strongly fault-tolerant design for the k-ary n-cube multiprocessor and examine its reconfigurability. Our design augments the k-ary n-cube with (/sup k///sub j/)/sup n/ spare nodes; each set of j/sup n/ regular nodes is connected to a spare node and the spare nodes are interconnected as a (/sup k///sub j/)-ary n-cube. Our approach utilizes the circuit-switched capabilities of the communication modules of the spare nodes to tolerate a large number of faulty nodes and faulty links without any performance degradation. Both theoretical and simulation results are presented.

Coordinating human operators and computer agents for recovery-oriented computing

This paper examines the errors committed by human operators of large networks and systems. It proposes a formal procedure in which system defense mechanisms are used to improve the coordination between human operators and computer agents. Further, it discusses and compares the effectiveness of different types of system defense mechanisms by performing experiments with Web-based GUI screens. In the process, the paper offers definitions of human errors and proposes methods to quantify such errors. Our experimental results have shown that more layers of system defense can play a pivotal role in minimizing commonly encountered human errors.

An Augmented k -ary Tree Multiprocessor with Real-Time Fault-Tolerant Capability

We present a real-time fault-tolerant design for an l-level k-ary tree multiprocessor and examine its reconfigurability. The k-ary tree is augmented by spare nodes and spare links. By utilizing the capabilities of wave-switching communication modules of the spare nodes, faulty nodes and faulty links can be tolerated. We consider two modes of operations. In the strict mode, the multiprocessor is under heavy computation or hard deadline and therefore we use a fast and local reconfiguration scheme to tolerate the faulty nodes. In the relaxed mode, where light computation or soft deadline is encountered, a global reconfiguration scheme is used to maximize the utilization of spare nodes, both in this mode as well as in the next strict mode. Both theoretical and simulation results are examined. Our simulation results, in the relaxed mode of operation, reveal that our approach can tolerate significantly more faulty nodes than other approaches, with a low overhead and no performance degradation.

Fault Tolerance in Hypercubes

This paper describes different schemes for tolerating faults in hypercube multiprocessors. A study of hypercube algorithms reveals that in many cases, the computations that require local communication are mapped onto topologies such as meshes or rings and the hypercube topology is used for global data communication. Therefore, a faulty hypercube needs to be reconfigured to perform both local and global communication as required by the algorithm, effectively and with minimal performance degradation. Two general approaches can be identified. The first approach looks into ways of utilizing the healthy processors and links of a hypercube with faulty nodes/links, for embedding topologies such as lower dimensional hypercubes, rings, meshes and trees for performing communication. The second approach makes use of hardware redundancy in the form of spare nodes and/or links and usually requires modifications in the communication hardware. Augmented hypercubes and spare allocation schemes are described.

Temperature and energy aware scheduling of heterogeneous processors

Modern computing requires faster and more powerful processing. Faster and more powerful processors have resulted in higher heat dissipation and power consumption. In this paper we present an offline algorithm called Temperature and Energy aware Dynamic Level Scheduling (TEDLS). It is able to schedule tasks in a heterogeneous environment with DVS enabled processors to minimize execution time, energy consumption and heat dissipation. We use a heat model to estimate the final temperature of a processor executing a task. This estimation of temperature is based on processor characteristics, which aids in choosing the cooler processors. Our simulation results have shown that the TEDLS algorithm not only results in processors having lower temperatures but also produces lower energy consumption as compared to the previous offline algorithms. The TEDLS algorithm also produces lower application execution time when the application size is small.

Optimal Subcube Allocation in a Circuit-Switched Faulty Hypercube

In this paper, we present a scheme where a (d - 1)-dimensional subcube is allocated in a faulty d-dimensional circuit-switched hypercube in the presence of up to 2(d - 1) faulty nodes. The scheme is then extended to allocate a (d - 1)-dimensional subcube in the presence of a combination of faulty nodes and faulty links. Theoretical proofs and simulation results are presented to analyze the performance of the scheme.

Optimal subcube fault tolerance in a circuit-switched hypercube

In this paper by utilizing the circuit-switched communication modules of the hypercube nodes, we present a scheme where a (d-1)-dimensional subcube is allocated in a faulty d-dimensional hypercube in the presence of up to 2/sup (d-1)/ faulty nodes. The scheme is then extended to allocate a (d-1)-dimensional subcube in the presence of a combination of faulty nodes and faulty links. Theoretical and simulation results are presented to analyze the performance of the scheme.