Baowei Kang

Fast reverse recovery body diode in high-voltage VDMOSFET using cell-distributed Schottky contacts

A new approach to improve the high-voltage vertical double-diffused MOSFET (VDMOSFET) body-diode recovery speed is proposed. In this approach, a Schottky contact is integrated into every cell of the VDMOSFET. Experimental results from the fabricated samples show a 50% decrease in the reverse recovery charge and a 60% increase in the softness factor of the body diode in 500 V/2 A VDMOSFETs.

Improving the CoolMS/spl trade/ body-diode switching performance with integrated Schottky contacts

A new approach to improve the CoolMOS/spl trade/ body-diode reverse-recovery speed is proposed. In this approach, a Schottky contact is integrated into every cell of the CoolMOS/spl trade/ structure. Incorporation of the cell-distributed Schottky contacts results in a significant improvement in the body-diode recovery speed. The Medici/spl trade/ mixed-mode simulation results show an over 58% improvement in the reverse-recovery charge of the body-diode in a 600V CoolMOS/spl trade/. There is no significant sacrifice to the other device characteristics. This approach provides a good solution to improve the body-diode recovery speed of the CoolMOS/spl trade/ without using the complicated carrier-lifetime-killing techniques.

A general design methodology for the optimal multiple-field-limiting-ring structure using device simulator

A design methodology for the optimal multiple-field-limiting-ring (FLR) termination structure is proposed. In the methodology, a simple modeling structure is developed to find the so-called BV-spacing curve, from which the optimal structure can be obtained directly without trial and error. The results given by the methodology is in excellent agreement with the experimental results. The applicability of the methodology is also investigated in a wide scope, which shows that the methodology has a very good performance in the medium-voltage-range FLR termination design.

Lifetime Control of Power Fast Recovery Diode with Low Emitter Efficiency Anode

Local lifetime control is obtained by means of local platinum doping using platinum gettering through the vacancy defects induced by proton irradiation. Assisted by total lifetime control using 4 MeV electron irradiation, a fast soft recovery power diode is manufactured. The reverse recovery time and softness is 110 ns and 1 respectively under test condition of 7F=25A, FB=400V, di/dt=80 A/mus, room temperature. It is equivalent to that of the international advanced diodes SML30EUZ12B. But the reverse leakage under FB=400V is only 208 nA at room temperature, only half of SML30EUZ12Bs. The performance of such diode is on top of congeneric products.

Evaluation of Trench-Gate Bipolar-Mode JFETs Used as High-Side Transistors in Low-Voltage Buck Converters

For the first time, power loss comparison between 20V-rated devices including a trench MOSFET and four kinds of trench-gate bipolar-mode JFETs (TB-JFETs) was carried out with the help of simulation based on static analysis and mixed-mode dynamic analysis using an inductive switching circuit. With at least 14% power loss improvement at 1 MHz and 19% at 2 MHz compared to that of the trench MOSFET, the calculation results have generated the confidence to take normally-on TB-JFETs, especially the one with buried oxide (BOX) to reduce the gate-drain capacitance CGD which can provide 6% more improvement at both 1 and 2 MHz, as competitive candidates to replace trench MOSFETs as a high-side switch in low-voltage high-frequency buck converters. Experimental data of CGD for normally-on JFETs with and without BOX agree to the simulated results and account for the extra improvement in dynamic loss provided by the device with BOX. On the other hand, the normally-off devices (with and without BOX) always perform the worst within the commonly used frequency range, which implies their uselessness.

Determination of the excess carrier lifetime in the collector region of silicon power bipolar transistors

An accurate nondestructive method to determine the excess carrier lifetime in the collector region of silicon n/sup +/-p-v-n/sup +/ power bipolar transistors is presented for the first time. Based on the measurement of the common-emitter collector characteristics and the collector-base junction C-V characteristics of the transistors, this method is also very simple and practical. The calculation results show that the excess carrier lifetime determined using this method is almost the same (with 1% difference) as that determined using the open circuit voltage decay (OCVD) technique with the emitter removed.

A New 20 V-Rated Buried-Oxide Trench-Gate Bipolar-Mode JFET FOR DC/DC Converters

A new normally-on buried-oxide (BOX) trench-gate bipolar-mode JFET (BTB-JFET) is reported for high-frequency low-voltage low-power-loss dc/dc converter applications. The BOX structure of the device is realized by localized thermal oxidation at the bottom of the gate trench. The fabricated BTB-JFET has a breakdown voltage of 21 V at VGS = -3 V. Due to the BOX under the gate region, the gate-drain capacitance CGD of the device is decreased by up to 30% at zero source-drain bias compared with that of the conventional trench-gate bipolar-mode JFET. The lower CGD reduces the switching times and the voltage dips during turn-on and turn-off. The resistive turn-on and turn-off times of the device are decreased from 31.5 to 30 ns and 12 to 10.5 ns, respectively. This approximately provides a 5% reduction in ton and 12% in toff, which is in agreement with the simulation results.

Modeling for internal transparent collector IGBT

Internal transparent collector (ITC) insulated gate bipolar transistor (IGBT) is a new type IGBT. Its structure is quite similar to that of the PT-IGBT, but a very low carrier lifetime control region (LCLCR) is introduced in the collector region near the p-collector/n-buffer junction. In this paper, an analysis model for ITC-IGBT is proposed. The collector current density is given. It is function of carrier injected level, device physical parameters (carrier diffusion coefficient, diffusion length), and technology parameters (Doping level, base width, and position of LCLCR). The influence of the position of LCLCR, as well as carrier lifetime in it, on devices characteristics are discussed. For certain current density, if carrier lifetime in LCLCR is less than 0.01ns, and LCLCR is localized at 0.9µm away from base/collector junction, hole injection level decreases with temperature. Considering the mobility also decreases with temperature, devices on-state voltage VON will have positive temperature coefficient. The device is rugged; If carrier lifetime in LCLCR is about 1ns, and LCLCR is just under base/collector junction, the hole injection level increase with temperature. Even if the mobilitys decrease with temperature can not compensate the reduction of VON, the decrease degree of VON is much less than that of PT-IGBT. The device is more rugged than PT-IGBT. Optimum the position and carrier lifetime of LCLCR can make the device either rugged or less temperature sensitive (VON increase little with temperature). The position and carrier lifetime of LCLCR also plays important role for devices turn-off feature. When the position of LCLCR is settled, the lower carrier lifetime in LCLCR is, the shorter falling time will be. But when carrier lifetime in LCLCR is less than 10ps, the falling time is seldom influenced by the carrier lifetime in LCLCR. Further reduction of turn-off time can be obtained by reducing the distance of LCLCR to the collector/base junction.

A Power Bipolar Integrated Device with Schottky Extension of Anode

In this paper, a structure named Schottky extension of anode (SEA) is proposed for BJT/diode power bipolar integrated devices. With BE reverse biased, it can serve as isolation between the main transistor and the internal diode of the integrated device and depress the hole injection from p-anode toward the region near or under the p-base, thus improve the reverse recovery of the internal diode. On the other hand, the forming method of this structure is completely compatible with the conventional processing of power bipolar devices, and no additional processing steps, difficulties and chip areas are needed. Therefore, this structure, while performing its good function, completely retains the low-cost and simple-processing advantages of power bipolar devices. Experimental results show that with the structure parameters given in this paper, an internal diode with the SEA structure can achieve an improvement of about 20%, compared with a conventional structure, in terms of resistive and inductive reverse recovery.