Bart Joseph Gerard Pauwels

Design and technology aspects of VLSIs for ATM switches

A system concept based on a multipath self-routing switching principle and on an internal transfer mode using multislot cells is introduced. With the utilization of a shared buffer memory structure, this concept allows for a single-chip realization of the switching elements and fulfils important system requirements like fault tolerance, independence of the switch core from external data formats and traffic characteristics, and modular extendibility from small to very large systems. An example implementation of the concept with the resulting functional partitioning in boards and chips is given. Performance study results, as a basis for dimensioning, are also presented. The most important design aspects and a possible tool chain exploiting a hardware description language, logic simulator, and logic compiler are highlighted. >

An asynchronous data-driven event-building scheme based on ATM switching fabrics

Asynchronous transfer mode (ATM) packet-switching network technology is proposed as the interconnect for building high-performance, scalable data acquisition architectures. This paper introduces the relevant characteristics of ATM and describes components for the construction of an ATM-based event builder: (1) a multi-path, self-routing, scalable ATM switching fabric, (2) an experimental high performance workstation ATM-interface, and (3) a VMEbus ATM-interface. The requirement for traffic shaping in ATM-based event-builders is discussed and an analysis of the performance of several such schemes is presented. >

Results from an ATM-based event builder demonstrator

ATM switching fabrics are good candidates to implement high performance parallel event builders for the future data acquisition systems of the LHC experiments. We are studying their feasibility through simulations and implementation of event builder demonstrators. The impact of the event builder characteristic traffic pattern on the switch has been studied and methods to avoid congestion in the switch have been proposed. Event building algorithms and data acquisition protocols have been developed. Measurements made with a demonstrator and comparisons with simulation studies are presented. The scalability of the measurements is discussed.

ATM as a universal transfer medium for user information, signalling and operation and maintenance

ATM has been selected as the transer mode for future integrated broadband networks. It has already been highlighted in numerous papers that ATM is capable of transferring voice, video and data. This paper describes the capability of ATM to transfer also signalling information and the impact of ATM on signalling as well as the capability of ATM to build a very powerful maintenance concept which can be used ubiquitous; i.e. as well in the transmission as in the switching systems. First this paper will describe the impact of ATM on signalling. This impact can be seen on all levels of the protocol stack. On level one the disappearance of a fixed D channel as in NISDN introduces the need for a meta-signalling concept for multidrop environments. The opportunities generated by this meta-signalling are described here. The impact on level 2 is the need to introduce a segmentation and reassembly layer On level 3 the impact of ATM is mostly reflected through the deftnition of the ATM bearer service. The maintenance philosophy of a future broadband network is also a keypoint to its success. Since ATM can be considered as a switching as well as a transmission principle, a universal maintenance concept can be defined This maintenance philosophy includes where and what sort of maintenance information and how this is gathered. Secondly, how this information is then transported to the maintenance centers and finally how this information is interpreted.