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Dive into the research topics where Yves Therasse is active.

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Featured researches published by Yves Therasse.


IEEE Journal on Selected Areas in Communications | 1991

Design and technology aspects of VLSIs for ATM switches

Thomas-Rolf Banniza; Gert Eilenberger; Bart Joseph Gerard Pauwels; Yves Therasse

A system concept based on a multipath self-routing switching principle and on an internal transfer mode using multislot cells is introduced. With the utilization of a shared buffer memory structure, this concept allows for a single-chip realization of the switching elements and fulfils important system requirements like fault tolerance, independence of the switch core from external data formats and traffic characteristics, and modular extendibility from small to very large systems. An example implementation of the concept with the resulting functional partitioning in boards and chips is given. Performance study results, as a basis for dimensioning, are also presented. The most important design aspects and a possible tool chain exploiting a hardware description language, logic simulator, and logic compiler are highlighted. >


Annales Des Télécommunications | 1993

VLSI architecture of a SMDS/ATM router

Yves Therasse; Guido H. Petit; Marc R. A. G. Delvaux

This paper presents a set of custom components used to implement a connectionless service on top of an atm network. In a first part, the chosen architecture is described, together with the level of performance requested. Then we analyze how the architecture and other constraints influence the chip partitioning. Finally the three custom devices developed for this application are succinctly described.RésuméCet article présente un ensemble de circuits sur mesure utilisés pour réaliser un service sans connexion dans un environnement atm. La première partie décrit ľ architecture choisie en même temps que le niveau de performance requis. Ensuite ľ article analyse la manière dont ľ architecture et ď autres contraintes influencent la décomposition en circuits. En dernier lieu, les trois circuits sur mesure développés pour cette application sont succinctement présentés.


Archive | 1993

Resequencing device for a node of a cell switching system

Yves Therasse; Pierre-Paul François Guebels


Archive | 1992

Method for reducing the number of bits in a binary word representing a series of addresses

Jozef Albert Octaaf Goubert; Yves Therasse; Bart Joseph Gerard Pauwels; Raymond Didier Albert Wulleman


Archive | 1992

Policing device and policing method using same

Bart Joseph Gerard Pauwels; Yves Therasse


Archive | 1991

Procedure for the reduction of the number of bits of a binary address word

Jozef Albert Octaaf Goubert; Yves Therasse; Bart Joseph Gerard Pauwels; Raymond Didier Albert Wulleman


Archive | 1992

Logical machine for processing control information of telecommunication transmission frames

Johan Maria Frans Dries; Yves Therasse


Archive | 1992

Resequencing means for a cell switching system node

Yves Therasse; Pierre-Paul François Guebels


Archive | 1993

Cell switching system node resequencing device

Yves Therasse; Pierre-Paul François Guebels


Archive | 1992

Einrichtung zum Wiederherstellen der richtigen Zellenfolge in einem Knoten eines Zellenvermittlungssystems Means for restoring the correct cells resulted in a node of a cell switching system

Yves Therasse; Pierre-Paul François Guebels

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