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Dive into the research topics where Bengt Werner is active.

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Featured researches published by Bengt Werner.


IEEE Computer | 2002

Simics: A full system simulation platform

Peter S. Magnusson; Magnus Christensson; Jesper Eskilson; Daniel Forsgren; Gustav Hållberg; Johan Högberg; Fredrik Larsson; Andreas Moestedt; Bengt Werner

Full system simulation seeks to strike a balance between accuracy and performance. Many of its possibilities have been obvious to practitioners in both academia and industry for quite some time, perhaps decades, but Simics supports more of these possibilities within a single framework than other tools do. Simics is a platform for full system simulation that can run actual firmware and completely unmodified kernel and driver code. It is sufficiently abstract to achieve tolerable performance levels, and it provides both functional accuracy for running commercial workloads and sufficient timing accuracy to interface to detailed hardware models. Simics can also run a heterogeneous network of systems from different vendors within the same framework. Exceptionally fast, Simics can easily add new components and leverage older ones within a practical abstraction level. It offers a platform with a rich API and a powerful scripting environment for use in a broad range of applications.


annual simulation symposium | 1995

Efficient memory simulation in SimICS

Peter S. Magnusson; Bengt Werner

We describe novel techniques used for efficient simulation of memory in SimICS; an instruction level simulator developed at SICS. The design has focused on efficiently supporting the simulation of multiprocessors, analyzing complex memory hierarchies and running large binaries with a mixture of system level and user level code. A software caching mechanism (the Simulator Translation Cache, STC) improves the performance of interpreted memory operations by reducing the number of calls to complex memory simulation code. Major data structures are allocated lazily to reduce the size of the simulator process. A well defined internal interface to generic memory simulation simplifies user extensions. Leveraging on a flexible interpreter based on threaded code allows runtime selection of statistics gathering, memory profiling, and cache simulation with low overhead. The result is a memory simulation scheme that supports a range of features for use in computer architecture research, program profiling, and debugging.<<ETX>>


modeling, analysis, and simulation on computer and telecommunication systems | 1997

A hybrid simulation approach enabling performance characterization of large software systems

Bengt Werner; Peter S. Magnusson

We describe a method for performance analysis of large software systems that combines a fast instruction-set simulator with off-line detailed analysis of segments of the execution. The combination is faster than straight cycle-accurate simulation, simpler and more flexible than techniques relying on hardware monitoring, and accurate. Specifically, the instruction-set simulator running at a slowdown of around 50, maintains enough target state throughout the execution that an arbitrarily collected segment of the instruction trace is sufficient input for a post-processing, cycle-accurate model of the processor and memory hierarchy. We present a case study to support our contention that a reduced state is sufficient as input to a cycle-accurate simulator. We use a commercial M88110-based prototype system as a reference point, and show that for three trace segments, the cycle-accurate post-processing gives reliable data to do system optimization.


international conference on parallel architectures and languages europe | 1993

Simulating the Data Diffusion Machine

Erik Hagersten; Mats Grindal; Anders Landin; Ashley Saulsbury; Bengt Werner; Seif Haridi

Large-scale multiprocessors suffer from long latencies for remote accesses. Caching is by far the most popular technique for hiding such delays. Caching not only hides the delay, but also decreases the network load. Cache-Only Memory Architectures (COMA), have no physically shared memory. Instead, all the memory resources are invested in caches, enabling in caches of the largest possible size. A datum has no home, and is moved by a protocol between the caches according to its usage. Furthermore, it might exist in multiple caches. Even though no shared memory exists in the traditional sense, the architecture provides a shared memory view to a processor, and hence also to the programmer. The simulation results of large programs running on up to 128 processors indicate that the COMA adapts well to existing shared memory programs. They also show that an application with a poor locality can benefit by adopting the COMA principle of no fixed home for data, resulting in a reduction of execution time by a factor three.


usenix annual technical conference | 1998

SimICS/sun4m: a virtual workstation

Peter S. Magnusson; Fredrik Dahlgren; Håkan Grahn; Magnus Karlsson; Fredrik Larsson; Fredrik Lundholm; Andreas Moestedt; Jim Nilsson; Per Stenström; Bengt Werner


Archive | 2004

METHOD AND SYSTEM FOR MULTIMODE SIMULATOR GENERATION FROM AN INSTRUCTION SET ARCHITECTURE SPECIFICATION

Bengt Werner; Magnus Christensson; Fredrik Larsson


Archive | 2005

Interpreter for executing computer programs and method for collecting statistics

Fredrik Larsson; Bengt Werner; Peter S. Magnusson


Archive | 2005

Method and system for improving simulation performance

Fredrik Larsson; Bengt Werner


Archive | 1997

SimGen: Development of Efficient Instruction Set Simulators

Fredrik Larsson; Peter S. Magnusson; Bengt Werner


Archive | 1994

Some Efficient Techniques for Simulating Memory

Peter S. Magnusson; Bengt Werner

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Fredrik Larsson

Swedish Institute of Computer Science

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Andreas Moestedt

Swedish Institute of Computer Science

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Fredrik Dahlgren

Chalmers University of Technology

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Fredrik Lundholm

Chalmers University of Technology

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Håkan Grahn

Blekinge Institute of Technology

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Jim Nilsson

Chalmers University of Technology

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Magnus Karlsson

Chalmers University of Technology

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