Benjamin Glas

A system architecture for reconfigurable trusted platforms

For improving the security of embedded systems, trusted computing is a promising technology. For the area of microprocessors in general and personal computers in particular the Trusted Computing Group (TCG) has published detailed specifications. The resulting hardware has been available for some years. This contribution discusses the feasibility of deploying ideas from trusted computing in the domain of reconfigurable hardware, esp. FPGAs, and possible benefits and drawbacks. We give a proposal to use actually available FPGA technology to build a trusted platform on reconfigurable hardware. We also show how trusted computing can deal with partial dynamic reconfiguration while still allowing the user to fully exploit its potentials.

Prime field ECDSA signature processing for reconfigurable embedded systems

Growing ubiquity and safety relevance of embedded systems strengthen the need to protect their functionality against malicious attacks. Communication and system authentication by digital signature schemes is a major issue in securing such systems. This contribution presents a complete ECDSA signature processing system over prime fields for bit lengths of up to 256 on reconfigurable hardware. By using dedicated hardware implementation, the performance can be improved by up to two orders of magnitude compared to microcontroller implementations. The flexible system is tailored to serve as an autonomous subsystem providing authentication transparent for any application. Integration into a vehicle-to-vehicle communication system is shown as an application example.

Car-to-Car Communication Security on Reconfigurable Hardware

To get more information about oncoming road and traffic situations, exchange of data between cars is a large benefit. But relying on data obtained from other cars and hence sensors not under direct control of the system, guaranteeing trustworthiness and integrity of this data is of paramount importance. This creates the need for security measures for the data exchange which impose high computational demands to achieve the low latencies needed for safety applications. In this contribution we present a hardware security module allowing ef- ficient calculation and verification of signatures. Implementation as well as integration aspects are being discussed in this paper.

Design of a Vehicle-to-Vehicle communication system on reconfigurable hardware

Vehicle-to-vehicle communication (V2VC) promises to be a next major step towards safe and efficient road traffic. This contribution presents a V2V communication system on FPGA-basis. It provides a flexible and modular hardware framework for various software-implemented V2V applications and routing algorithms. Exploiting the benefits of reconfigurable hardware the system manages to provide hardware acceleration for security processing and data preprocessing while at the same time being adaptive to traffic situations, different environment and evolving standards and applications. We present the overall structure of the system, detail modules and communication system and present special mechanisms used to exploit FPGA benefits. Finally we give results concerning performance values and resource usage.

Priority-based packet communication on a bus-shaped structure for FPGA-systems

We present an application tailored packed-based SoC communication system with one-hop communication between all entities, priority-based arbitration, broadcast and multicast support on a bus-shaped basis. It is located as a hybrid between NoC and bus approaches, closing the gap for mostly streaming-based systems with the need for highly flexible communication patterns and multicast messages that are below a certain size. The system is implemented and evaluated on a FPGA within a car-to-car communication gateway application.

A Prototype of Trusted Platform Functionality on Reconfigurable Hardware for Bitstream Updates

Abstract This contribution proposes a secure and efficient method for updating reconfigurable hardware devices like FPGAs by using trusted computing technology. An interesting application is latent in the domain of embedded systems like in the automotive sector when durable products shall be updated in the field while stringent safety and security constraints have to be met. We propose an architecture to send arbitrary FPGA configuration bitstreams personalized to specific platforms over public channels. By using trusted platform modules we achieve a secure delivery chain for IP cores without the need of predefined shared secrets or keys. Furthermore integrity and confidentiality of the IP and enforcement of usage policies can be guaranteed. This enables the vendor to ensure a correct configuration of the device in order to adhere safety commitments. As a side effect such methods can also be used to deliver IP-cores from multiple IP vendors to remote devices securely and efficiently.

Configuration Measurement for FPGA-based Trusted Platforms

This paper proposes a method for measuring hardwareconfigurations for trusted platforms based on field programmablegate arrays (FPGA). The proposed system setupallows for partial reconfiguration as well as full reconfigurationof FPGA devices that can be used additionallyas trusted platforms. In the system, slots are defined forfast partial dynamic reconfiguration. Predefined IP blocksmay be configured into these. The reconfiguration is monitoredand reported to a trusted platform module (TPM).Important configuration characteristics are extracted fromthe bitstream, stored, and evaluated in terms of predefinedpolicies to ensure the integrity of the trusted FPGA platform.By incorporating this method the chain-of-trust known fromtrusted computing is extended into the underlying hardware.This enables remote verifiers to ensure a correct configurationof the device in order to adhere to safety commitmentsand allows for highly adaptive, trusted system-on-chips.

Testing of an FPGA Based C2X-Communication Prototype with a Model Based Traffic Generation

While research and standardization in the area of car-to-X (C2X) communication gains interest steadily, realizationand integration in On-Board-Units (OBU) becomes an issue.Lacking existing testbeds, the evaluation, test, and rapid prototypingof such systems relies on stimulation from simulatedenvironments. We present an extension of an open-sourcetraffic simulation to allow generation of C2X communicationmessages and linking to a hardware OBU. Implementationof the system and application for evaluation and test of aFPGA-based C2X communication system is described.

Exploration of uninitialized configuration memory space for intrinsic identification of Xilinx Virtex-5 FPGA devices

SRAM-based fingerprinting uses deviations in power-up behaviour caused by the CMOS fabrication process to identify distinct devices. This method is a promising technique for unique identification of physical devices. In the case of SRAM-based hardware reconfigurable devices such as FPGAs, the integrated SRAMcells are often initialized automatically at power-up, sweeping potential identification data. We demonstrate an approach to utilize unused parts of configuration memory space for device identification. Based on a total of over 200,000 measurements on nine Xilinx Virtex-5 FPGAs, we show that the retrieved values have promising properties with respect to consistency on one device, variety between different devices, and stability considering temperature variation and aging.

Intrinsic Identification of Xilinx Virtex-5 FPGA Devices Using Uninitialized Parts of Configuration Memory Space

SRAM based fingerprinting is a promising technique for unique identification of physical devices. This method uses deviations in power-up behaviour caused by the CMOS fabrication process to identify physical devices. In the case of SRAM-based hardware reconfigurable devices such as FPGAs the integrated SRAM cells are often initialized automatically at power-up, sweeping potential identification data. We present an approach to utilize unused parts of configuration memory space for device identification. Based on a total of over 160,000 measurements on eight Xilinx Virtex-5 FPGAs we show that the retrieved values have promising properties with respect to consistency on one device and variety between different devices.