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Featured researches published by Bernd Schafferer.


international solid-state circuits conference | 2004

A 3V CMOS 400mW 14b 1.4GS/s DAC for multi-carrier applications

Bernd Schafferer; Richard Adams

This paper presents an uncalibrated 0.18 /spl mu/m CMOS 14 bit 1.4 GS/s DAC, with an LVDS interface, which achieves 67 dB SFDR for a 260 MHz full-scale tone and 70 dB ACLR for a two-carrier output, centered at 470 MHz. The IC dissipates a core power of 200 mW.


Archive | 2003

Constant switching for signal processing

Bernd Schafferer


Archive | 2004

Differential clock receiver with adjustable output crossing point

Bernd Schafferer


Archive | 2007

Mixer/DAC Chip and Method

Yunchu Li; Bernd Schafferer


Archive | 2004

Control loop for minimal tailnode excursion of differential switches

Bernd Schafferer


Archive | 2006

Spread spectrum communication and synchronization

Yunchu Li; Gil Engel; Bernd Schafferer


Archive | 2004

CLOCK SYNCHRONIZATION LOGIC

Bernd Schafferer


Archive | 2014

Clock signal error correction in a digital-to-analog converter

Bernd Schafferer; Ping Wing Lai; Qiurong He


Archive | 2014

All digital zero-voltage switching

Bernd Schafferer; Bing Zhao


Archive | 2014

Radio frequency domain digital pre-distortion

Bernd Schafferer; Bing Zhao

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