Bhagwan Das

Frequency domain technique for reducing chromatic dispersion

In this paper the chromatic dispersion is reduced using frequency domain technique. Frist an analog signal of specific frequency is generated then signal is converted in digital domain. Digital signal is modulated with QAM scheme. Electrical to optical conversion is performed using intensity modulation. Then this optical signal is propagated in to the fiber channel using the Split step Fourier method which use Nonlinear Schrodinger Equation (NLSE). In this simulated optical channel the 15 Km distance is simulated. At the end of fiber link signal is converted in optical to electrical domain for demodulation. Then Frequency domain techniques FFT is applied to reduce the CD. Pulse shaping filter is used to improve the response signal. During the propagation of signal in the channel signals phase is distorted to improve phase Kaiser Window is used. Pulse evaluation model is compared before and after chromatic dispersion reduction that illustrate that CD is reduced due to frequency domain technique.

All Optical Signal Restoration for 10G DPSK System

Ultrafast Kerr nonlinearity, offers various signal processing functions to be used. Several nonlinear transmission impairment such as phase noise, amplitude noise and power spectral efficiency loss become proficient to degrade the performance of optical systems, when intense power is launched in optical fiber. In modern communication system, all optical regeneration is one of the solution to mitigate transmission impairments instead of O-E-O conversion. In this paper, all optical regeneration is demonstrated for 10G DPSK system using 3R regeneration and phase sensitive amplification to mitigate amplitude and nonlinear phase noise form 10G noisy DPSK transmission system. Bit error rate of 10−12 is achieved at power penalty of 5 dBm. In developed system the novelty exist in compensating two noise simultaneously; ASE noise and phase noise using integrated algorithm developed using 3R and PSA. The system is developed and tested using commercial software package optisystem to check the feasibility of the system design in real time implementation. The developed all optical regeneration system is very demanding for long distance high-speed communication systems. The result conclude the positive feasibility for real time implementation of designed system.

GTL based Internet of Things enable processor specific RAM design on 65nm FPGA

In this work, we Energy Efficient Internet of Things (IoTs) Enable RAM is presented. In order to make it energy efficient, used Gunning Transceiver Logic (GTL) IO Standard and Gunning Transceiver Logic Plus (GTLP). We used the 4 different members of GTL and GTLP IO standards family and searched the most energy efficient among them. We observed that when we use 3.6 GHz operating frequency, there is 90.2% reduction in I/O power when we used GTL instead of GTLP_DCI. We have inserted a 128-bit IP address in RAM to make internet of things enable RAM. Finally, we operated our IOTs Enable RAM with different operating frequency of I3, I5, I7, Moto-E and Moto-X.

Energy-efficient Pseudo Noise generator based optical transmitter for Ethernet(IEEE 802.3az)

In this paper Pseudo Noise generator based optical transmitter is designed to increase the range of Ethernet based networks. Structural changes are proposed in PN generator based optical transmitter for energy efficient Ethernet (IEEE802.3az) to be integrate with different IEEE802.3 protocols (IEEE fiber optic standard). Energy efficient Ethernet design is realized by choosing the most energy efficient IO standards between LVCMOS12 and HSTL_II. Compatibility of this PN generator based optical transmitter is tested for different IEEE802.3 fiber optic standards. The PN generator has operating frequency for 1000BASE-T i.e. IEEE802.3ab, 10GBASE-CX4 i.e. IEEE 802.3ak, 100BASE-T1 i.e. IEEE 802.3bw, 1GBASE-PR i.e. IEEE802.3av is 1000GHz, 10GHz, 100GHz and 1GHz respectively. The LVCMOS12 IO standard will be use in final design to make PN generator more energy efficient, because the power saving for LVCMOS12 is 77.1% more than HSTL_II. There is 96.7% reduction in clock power and 99% reduction in signal power is observed for LVCMOS12 design when using 1GBASE-PR Ethernet configuration for Energy efficient PN generator based optical transmitter. Finally this system will be integrated with other optical components to make optical communication system green. Xilinx ISE14.7 design tool is used to perform the experiment.

DSP techniques for reducing chromatic dispersion in optical communication systems

In this paper the chromatic dispersion is reduced for enhancement in the performance of optical communication system. For this an analog test signal is generated and converted into digital domain and modulated with 16 QAM by gray code mapping. Through Split Step Fourier technique the signal is propagated in the optical fiber link for 15 km of simulated distance. At the end of this distance the chromatic dispersion is observed and to reduce Chromatic Dispersion (CD) signal is converted in electrical form at end of optical fiber link. Digital Signal Processing techniques are applied on dispersed signal to reduce the CD. Analysis is based on Bit Error Rate that are compared before and after the induction of chromatic dispersion. In this research CD is reduced electronically so it will save the requirement of optical amplifiers.

Development of All Optical Signal Regeneration Method for 100 Gb/s Differential Phase Shift Keying Degraded Signal

In long haul communication systems signal is transmitted at extensive distance. Today, most of the systems have signal regeneration are not efficient enough to regenerate the 100 Gb/s signal for low Bit Error Rate (BER) of 10−10 at lower than −10 dBm received power with noise mitigation. In this paper, a new all-optical signal regeneration technique is demonstrated for 100 Gb/s degraded Differential Phase Shift Keying (DPSK) signal that regenerate the signal quality using matlab Simulink model. The developed technique has achieved the 10−15 BER at −15 dBm with noise (amplitude and phase) mitigation up to 90 % for degraded signal compared to existing signal regeneration that are limited to offer the BER of 10−10 at −9 dBm not more than 60 Gb/s transmission systems. The proposed technique will be helpful to improve the performance of existing signal regeneration systems in terms of BER at low power penalty.

Voltage Scalling Based Traffic Light Controller Design on Virtex-7 FPGA Family

Polymer blend becomes one of the effective methods in the development of polymer industries. By applying this technique, it can help to control the environment and create new material with better performance from a net polymer. PP and ABS are the most extensively used commodity polymer due to their good mechanical properties. The aim of this study is to identify the injection molding parameters of PP and ABS such as melt temperature, mold temperature, injection pressure and holding pressure and is to inspect the mechanical properties of hybrid material between ABS and PP such as tensile strength, tensile modulus, and elongation. The relationship between the control parameters and the output response for the hybrid material has also been determined. The samples of PP/ABS blends were prepared via injection molding and have been categorized based on weight percentage. The parameter setting was selected based on the data available in the literature and suggested from resin supplier which is mold temperature, melt temperature, injection and holding pressure. The results showed that with the addition of ABS, the tensile stress is reduced causing the material becomes brittle. With the increasing content of ABS in PP/ABS blends, the tensile modulus will increase while the percentage of elongation in PP/ABS blends decreased. Holding pressure was the most significant effects for tensile strength in PP/ABS blends found from Signal to Noise Ratio (S/N) in the Taguchi Method.

Timing Constraints-Based High-Performance DES Design and Implementation on 28-nm FPGA

In this work, we are going to implement DES algorithm on 28-nm Artix-7 FPGA. To achieve high-performance design goal, we are using minimum period, maximum frequency, minimum low pulse, minimum high pulse for different cases of worst-case slack, maximum delay, setup time, hold time, and data skew path. The cases on which analysis is done are like worst-case slack, best-case achievable, timing error, and timing score, which help in differentiating the amount of timing constraint at two different frequencies. We analyzed that in timing analysis, there is maximum of 19.56% of variation in worst-case slack, 0.29% change for best-case achievable, 41.17% change in timing error, and 64.12% change in timing score for two different frequencies. From this work, we also notified the delays during various signals; accordingly, we have designed our own algorithm with strong security encryption.

Development and testing of a novel all-optical signal regeneration technique

In this paper, a new all-optical signal regeneration technique is designed by integrating the degenerated Four Wave Mixing (FWM) and designed optical locked signal mechanism. The developed technique is tested over three noisy 15Gb/s DPSK test signals via simulation. These signals are configured with different wavelengths and inclusion of different level of phase noises. The noisy DPSK test signals carried out approximate BER of 10-5 at power penalty of -6 dBm. The developed all-optical signal regeneration technique yields approximate BER of 10-12 at -14 dBm power penalty for three DPSK distorted test signals. The developed technique will be helpful to improve the performance of existing regeneration systems.

Time analysis based IOTs (Internet of Things) enable TeraHertz RAM design on 40nm FPGA

This paper subsumes the concept of Internet of Things on a Tera Hertz RAM on the 40nm FPGA. Time analysis has been performed on a Tera Hertz RAM. This produces correspondingly higher speeds as compared to any other form of RAM available. The main focus has been on studying the slack for various frequencies. Slack is a kind of error and should be as low as possible. We aim to find that optimum condition at which the value of slack is minimized. Internet of Things is the core concept used here. It deals with the accession of any device form a fairly large distance. The frequency has been varied between 1GHz and 1THz. The variations in slack, timing score, low pulse slack have been observed. It has been found that the need of the control measures increases at higher frequencies. XILINX 12.1 and Verilog Hardware Description Language have been used for the purpose of analysis. This research would illumine the future of the concept of the Internet of Things and would take up the level of the communication to a step ahead.