Boleslav Psota

Usage of LTCC technology in electronic packaging

Low Temperature Co-fired Ceramics (LTCC) is very progressive technology, which finds utilization in a couple of applications deal with new microelectronic structures and configurations. Contributing application is also electronic package, where LTCC offers many possibilities, such as realization of 3D structures, embedded components, etc. In this paper the main aim is focused on usage of this technology for design and development of new electronics package, which should be cheap and easy for manufacturing. Such type of package will be very useful either for research laboratories and test vehicles or for simple electronic circuits, which needs to be attached to the electronics system through the package.

Modeling of microelectronic structures and packages using ANSYS software

This paper informing about the modeling of BGA structures using ANSYS software. The FEA method is cleared up, but the main emphasis lays on mechanical stress issues. As example is shown the comparison of three different solders and described their usage for electronic components.

The vibration testing as tool for optimizing of two PCB connection

This article deals with the use of mechanical testing to optimize the configuration of PCB. Specifically, the system of two connected boards is being investigated under the vibration load. Vibration measurement of such system is compared with the computer simulation and results from both methods are then evaluated including defining the main parameters. This research is related to the European project Board on Board (BOB), which focuses on new technology of two board interconnection, which is dedicated for high density assembly and interconnection.

Influence of the cavities on the PCB mechanical properties

Purpose – The main aim of this paper is to investigate the influence of the cavity coverage on the printed circuit boards (PCB) to the resonant frequency, acceleration and displacement. Design/methodology/approach – Tests were realized on four PCBs with different cavity areas. Frequency range of tests was between 10 and 2,000 Hz with 0.3 g acceleration amplitude. In addition, more simulations were performed to check different setups of the boards. Findings – From the calculated and measured data, it is clear that with the larger cavity area the resonance frequency drops. In case a greater number of components placed in cavities are needed on board, it is appropriate to use multiple smaller cavities than the bigger ones. Originality/value – Results in this paper could be very useful for PCB manufacturers and designers during designing of the new PCBs with cavities for dipped components.

Mechanical testing of PCB using computer simulations

This paper deals with the usage of the computer simulation for the mechanical testing of the PCBs to obtain optimal configuration for mechanical reliability. The main target is to determine factors that are the most important role for this kind of analysis. For this purpose sensitive analysis were made and following critical data were defined. The critical step is to determinate correct material data as well as properties of the board including its attachment.

Compatibility of through-hole technology devices with low-temperature co-fired ceramic substrate

The article is focused on usage of the through-hole technology (THT) devices on low-temperature co-fired ceramic (LTCC) substrate. This usage is not common, therefore the main aim of this work is finding out the compatibility between LTCC substrate and a structure of devices lead, solder and thick-film paste. Two arrangements of through-hole metallization were used - printing and hole-filling. The most important results are establishment of reliable assembly process and thermal stress strength for finding the possibility of high temperature application. This is found out by ANSYS software simulation and temperature cycling. Defects caused by temperature cycling were studied optically using micro-cuts.

The Use of Computer Simulation in the Electronic Packaging Process

This paper deals with the use of the computer simulation for semiconductor chip attach investigation, where the wire bonding is the mostly used process. The main focus lays on the correct definition of the capillary trace, which is essential for creation of a good bond contact as for chip, as well for package or substrate pad. Several simulations for different shapes of loops were created and compared with real bonds, which were done based on the settings from the analysis.

Optimization of wire loop formation in wirebonding process using computer simulation

This paper informs about the simulation of the wirebonding process. We are primary focus on a loop formation and definition of the wire behavior during this process. Simulation model of the bonding structure was created and the definition of the loop shape for different application was gained.

Zero shrink LTCC 3D structure interconnections

This paper describes design, construction and some recent tests of three dimensional stacked lead-free soldered structures based on Low Temperature Co-fired Ceramic substrates (LTCC). These structures have a great potential to create compact structure combining multiple different modules in one package. Internal connections used in these 3D structures have an important role, because they not only provide electrical and signal connection, but they also present mechanical attachment between connected substrates. Goal of this work is to develop, simulate and evaluate new structures based on interesting “zero shrink” Heraeus HL2000 LTCC substrates, where dimples help to reduce thermo-mechanical stress and pads modified with copper to reduce problems with leaching.