Bonghyuk Park

A 12-GHz Fully Integrated Cascode CMOS

A fully integrated complementary metal oxide semiconductor (CMOS) cascode LC voltage controlled oscillator (VCO) with Q-enhancement technique has been designed for high frequency and low phase noise. The symmetrical cascode architecture is implemented with negative conductance circuit for improving phase noise performance in 0.18 mum CMOS technology. The measured phase noise is -110.8 dBc/Hz at the offset frequency of 1 MHz. The tuning range of 630 MHz is achieved with the control voltage from 0.6 to 1.4 V. The VCO draws 4.5 mA in a differential core circuit from 1.8 V supply.

LC

This paper presents a direct-conversion I/Q up-mixer block, which is implemented in 0.18 mum CMOS technology, for the ultra-wideband (UWB) system. To achieve wideband characteristics, a shunt-peaking load is used in the up-mixer. A new wideband amplifier is also proposed, which can suppress unwanted common-mode signals with high linearity. The simulation results show gain flatness of less than 0.5 dB for three channels, a maximum output power level of -4.3 dBm, and a sideband rejection ratio of more than 60 dBc. The current consumption of this design is 27 mA from a 1.8 V power supply

VCO With

Ultra-wideband (UWB) systems use wide band-width of 3.1 to 10.6 GHz to provide ultra high data-rate for wireless applications. Implementation of UWB RF transceiver in the 3-5 GHz band (mandatory mode) makes big challenges that must be solved by circuit and system techniques. The proposed radio frequency (RF) transceiver, which is implemented in 0.13 mum complementary metal-oxide semiconductor (CMOS) technology, is a part of a three-chip solution, but later it will be one chip solution which includes RF, modulation and demodulation (modem), and medium access controller (MAC). The proposed WiMedia RF transceiver system can transmit and receive 4- high-definition (HD) channel streaming simultaneously.

Q

A variable gain amplifier is designed for wideband system. The VGA is implemented in a 0.18 /spl mu/m CMOS process. The gain of the VGA is controlled digitally in dB using proposed a R ladder with switch and decoder. It operates at an IF frequency of 250 MHz and dynamic range is 27 dB.

-Enhancement Circuit

Two ∆Σ-modulated digital radio-over-fiber (DRoF) transmission systems that employ a multi-pulse Manchester encoder are proposed and experimentally evaluated. With a two-step modulation process comprised of ∆Σ modulation and multi-pulse Manchester encoding, a high frequency replica or image of a ∆Σ-digitized analog communication signal can be transmitted without significant power loss. This is achieved by exploiting the spectral characteristics of the modified Manchester code. For comparative analysis, a conventional ∆Σ-modulation-based DRoF system is also evaluated. Based on the evaluation results, the proposed DRoF systems more significantly improve the reliability and flexibility of the RoF system by providing higher power margins or by making the DRoF system implementation more cost-effective and easier to perform on account of the low-frequency requirement for electronics and optical transceivers.

A CMOS direct-conversion I/Q up-mixer block for ultra-wideband system

The proposed MB-OFDM UWB transmitter system, which is implemented in 0.13 mu CMOS technology, consists of a LPF, a VGA, a V-I converter, an up-mixer, and a driver amplifier. Measured results show maximum transmitted output power level of -10 dBm, output P1dB of -7 dBm, and bandwidth of more than 250 MHz and gain flatness of less than 1 dB for all three sub-bands. The implemented transmitter can transmit 4-HD channel simultaneously, so that make wireless links between multimedia devices demanding high data rate.

A WiMedia UWB Transceiver for 4-HD Channel Streaming

The paper describes a novel CMOS heterodyne architecture at 5 GHz band which is fabricated in 0.18 /spl mu/m CMOS process operating from a power supply of 1.8 V. We designed the up-mixer, down-mixer and LNA for the 5 GHz band, and the VCO for the 2 GHz band related to our heterodyne architecture. The LPCC 24 pin package is used with package modeling and the 4 key blocks occupy a die area of about 1.5 mm/sup 2/. An off-chip power amplifier is to be used for overall power saving.

Digitally controlled wideband CMOS variable gain amplifier

This paper compares performance of three transmitter/receiver (T/RX) switch structures, which can be included as UWB RF transceiver. They are designed using complementary metal-oxide semiconductor (CMOS) 0.13 um technology and simulated each structure. They can be operated from 3 to 5 GHz and package model are applied for chip on board(COB) test. They have 1.8 dB insertion loss and more than 30 dB isolation at 5 GHz.

Digital radio-over-fiber system with multi-pulse Manchester encoding-assisted delta-sigma modulation

This paper presents a direct-conversion receiver block design for ultrawideband applications. Implemented in 0.18 μ m CMOS technology, the receiver combines switch, LNA, down-mixer, LPF, VGA. The RF block, switch, LNA, and down-mixer are operating across the frequency range of 3~5 GHz. The analog block, LPF and VGA are working across cutoff frequency range about 260 MHz. The power dissipation of direct-conversion CMOS receiver block including switch is 106.4 mW at 1.8 V voltage supply.

A MB-OFDM UWB Transmitter for 4-HD Channel Streaming

This paper presents RF prototype system for DS-CDMA ultra wide-band (UWB) communication. The Federal Communication (FCC) authorized the commercial use of the UWB technology in February 2002. Where, the frequency range of the spectrum mask in an indoor environment is from 3.1 GHz to 10.6 GHz. But because of 5 GHz wireless LAN, they usually use frequency band from 3.1-4.9 GHz. This prototype RF system can be satisfied with these limitations. Its structure is direct conversion and receiver dynamic range is 40 dB (-40 dB -80 dB)