Bonkee Kim

Highly linear receiver front-end adopting MOSFET transconductance linearization by multiple gated transistors

Highly linear receiver RF front-end adopting MOSFET transconductance linearization by linearly superposing several common-source FET transistors in parallel (multiple gated transistor, or MGTR), combined with some additional circuit techniques are reported. In MGTR circuitry, linearity is improved by using transconductance linearization which can be achieved by canceling the negative peak value of g/sub m/ of the main transistor with the positive one in the auxiliary transistor having a different size and gate drive combined in parallel. This enhancement, however, is limited by the distortion originated from the combined influence of g/sub m/ and harmonic feedback, which can greatly be reduced by the cascoding MGTR output for the amplifier and by the tuned load for the mixer. Experimental results designed using the above techniques show IIP/sub 3/ improvements at given power consumption by as much as 10 dB for CMOS low-noise amplifier at 900 MHz and 7 dB for Gilbert cell mixer at 2.4 GHz without sacrificing other features such as gain and noise figure.

A new linearization technique for MOSFET RF amplifier using multiple gated transistors

A simple linearization technique using multiple gated common source transistors is proposed where gate width and gate drive (V/sub gs/-V/sub th/) of each transistor are chosen to compensate for the nonlinear characteristics of the main transistor. To demonstrate the feasibility of this approach, a prototype double-gated RF amplifier using two MOSFETs is implemented and its RF characteristics are compared with those of a single one. The results show that, compared with a conventional single-gate transistor amplifier, the third order intermodulation (IMD/sub 3/) is improved by 6 dB with similar gain, fundamental output power, and DC power consumption. Because the auxiliary transistor is smaller than the main one and biased at subthreshold, adding this does not affect amplifier characteristics appreciably other than the nonlinearity. With further optimization using multiple gated transistors, much better nonlinear performance per power consumption would be expected.

A 13-dB IIP3 improved low-power CMOS RF programmable gain amplifier using differential circuit transconductance linearization for various terrestrial mobile D-TV applications

A CMOS RF digitally programmable gain amplifier (RF PGA), covering various terrestrial mobile digital TV standards (DMB, ISDB-T, and DVB-H) is implemented as a part of a low-IF tuner IC using 0.18-/spl mu/m CMOS technology. An improvement of 13-dB IIP3 is attained without significant degradation of other performance criteria like gain, noise figure, common-mode rejection ratio, etc., at similar power consumption. This is achieved by applying a newly proposed differential circuit gm (the second derivatives of transconductance) cancellation technique, called the differential multiple gated transistor (DMGTR). In the DMGTR amplifier, the negative value of gm in the fully differential amplifier can be compensated by the positive value of gm in the pseudo differential amplifier which is properly sized and biased. By adopting the DMGTR, a low-power highly linear RF PGA is implemented. Also, in order to have wide gain range with fine step resolution, a new RF PGA architecture is proposed. The measurement results of the proposed RF PGA exhibit 50-dB gain range with 0.25-dB resolution, 4.5-dB noise figure, a -4-dBm IIP3 (maximum 30 dBm) and 25-dB gain at 16-mW power consumption.

Monolithic planar RF inductor and waveguide structures on silicon with performance comparable to those in GaAs MMIC

The monolithic inductors and transmission lines on Si substrate with very high Q factor, low insertion loss, and high resonant frequency, are achieved by using very thick polyimide (10 /spl mu/m) as dielectric material, and thick Al (4 /spl mu/m) metalization system. This structure is made on the finished conventional standard two layer metalization BiCMOS wafer. For 10 nH inductor, 6 GHz resonant frequency, maximum Q factor of 5.5 at 1.2 GHz, and 1.2 dB insertion loss at 3 GHz are obtained, which are very comparable to those available in GaAs MMIC, These inductors can be used as RF choke as well as matching element. Transmission lines are also fabricated using this technology. The S/sub 21/ of coplanar waveguide with 1 mm length is -0.2 dB at 4 GHz, and that of microstrip line is -0.3 dB. It is expected that, using these passive elements, Si RF IC can be designed up to several GHz with performance comparable to GaAs MMIC.

High-performance electroplated solenoid-type integrated inductor (SI/sup 2/) for RF applications using simple 3D surface micromachining technology

Electroplated solenoid-type integrated inductors (SI/sup 2/s) have been demonstrated to have high performance and small area occupation for GHz applications, using a new, simple, and highly adaptable 3D surface micromachining technology. The method utilizes simply modified conventional photolithography and well-established electroplating at a low process temperature (<120/spl deg/C), so that the post-IC process and batch fabrication are possible. We have fabricated a 20-turn SI/sup 2/ with an inductance of 2.5nH, a peak Q-factor of 19 at 5.5 GHz, and the surface area occupation of 800 /spl mu/m by 90 /spl mu/m excluding pads (50 nH/mm/sup 2/), from the entirely unoptimized initial fabrication on a glass substrate. Also, a 10 nH and a peak Q of 12.5 at 2.3 GHz have been obtained from an 80-turn SI/sup 2/ (27 nH/mm/sup 2/).

CMOS RF amplifier and mixer circuits utilizing complementary Characteristics of parallel combined NMOS and PMOS devices

Design and chip fabrication results for complementary RF circuit topologies that utilize the complementary RF characteristics of both NMOS and PMOS field-effect-transistor devices combined in parallel way are reported, which can inherently provide single-ended differential signal-processing capability, requiring neither baluns, nor differential signal generating/combining circuits. The proposed complementary CMOS parallel push-pull (CCPP) amplifier gives an order of magnitude improvement in IP/sub 2/ than an NMOS common-source amplifier and single-balanced CCPP resistive mixer, which functions effectively as a double-balanced one, provides more than an order of magnitude better linearity in IP/sub 2/, and similar order of magnitude better local oscillator (LO)-IF and LO-RF isolations than NMOS counterparts.

Highly linear CMOS RF MMIC amplifier using multiple gated transistors and its Volterra series analysis

CMOS RF MMIC amplifiers are fabricated with linearization technique using multiple gated transistors. At 900 MHz, double and triple gated amplifiers show 2.5-4.5 dB larger figure of merit (linearity-DC power consumption), which means that only 1/2/spl sim/1/3 of DC power is needed to obtain the same OIP/sub 3/ value. Using Volterra series analysis and harmonic balance simulation, it is shown that the linearization technique with the 2nd harmonic termination can increase IIP/sub 3/ by amount of 16 dB max. without additional DC power consumption at optimal bias condition, which can reduce more than 90% of DC power consumption with the same linearity performance.

Simple modeling of coplanar waveguide on thick dielectric over lossy substrate

We present a simple semi-empirical high-frequency equivalent circuit model to characterize the coplanar waveguide structure, which consists of a relatively thick metal line on very thick polyimide over a lossy substrate such as a Si BiCMOS wafer. Considering the geometric dependence of the conductive loss and the skin effect of the substrate loss, we derive modified models for the equivalent circuit elements. We verify the validity of our model by comparing it with experimental measurements. Our model is simple enough not only to be suitable for efficient circuit simulation but also to be useful for process characterization and design.

A 13 dB IIP3 improved low-power CMOS RF programmable gain amplifier using differential circuit transconductance linearization for various terrestrial mobile D-TV applications

A CMOS RF digitally programmable gain amplifier, covering various terrestrial mobile digital TV standards (DMB, ISDB-T, and DVB-H) is implemented. 13 dB IIP3 improvement is attained without losing out on other performance criteria like gain, NF, CMRR, etc. at similar power consumption. This is achieved by applying a newly proposed differential circuit gm cancellation technique. The IC exhibits 55 dB gain range with 0.25 dB resolution, 4.5 dB NF; a -4 dBm IIP3 (maximum 30 dBm) and 25 dB gain at 16mW power consumption.

Highly linear RF CMOS amplifier and mixer adopting MOSFET transconductance linearization by multiple gated transistors

A highly linear CMOS RF amplifier and mixer circuits adopting MOSFET transconductance linearization by linearly superposing several common-source FET transistors in parallel, combined with some additional circuit techniques such as cascode for amplifier and harmonic tuning for mixer, are reported. Experimental result designed using above techniques shows IP3 improvements at given power consumption by as large as 10 dB for RF amplifier at 900 MHz and 7 dB for Gilbert cell mixer at 2.4 GHz without sacrificing other features such as gain and NF.