Seyeob Kim

A UHF Mobile RFID Reader IC with Self-Leakage Canceller

A UHF mobile single chip RFID reader is implemented in 0.18 mum CMOS process. Developed IC achieves DA output power of 3 dBm, OIP3 of 14.8 dBm, phase noise of -100 dBc/Hz at 100 kHz offset, noise figure of 35.5 dB for talk mode, 6.2 dB for listen before talk (LBT) mode, and current consumption of 108 mA from a 1.8 V supply. With an external PA, Tx output generates output power of 27 dBm with OIP3 of 42.5 dBm. A leakage signal cancellation scheme is employed to suppress inevitable Tx leakage into Rx input. At a distance of 90 cm between antenna and tag the average recognition ratio is increased from 0% to 42.8% by the leakage canceller.

A 9dBm IIP3 direct-conversion satellite broadband tuner-demodulator SOC

A direct-conversion satellite tuner-demodulator IC is realized using 0.18/spl mu/m CMOS technology. The IC down-converts a 950-2150MHz satellite broadcasting signal to base band and demodulates the signal to an MPEG data stream. The IC conforms to both DVB-S and DSS standards. Experimental results show a 9dBm IIP3 while consuming 230mA from 1.8V supply.

A CMOS single-chip direct conversion satellite receiver for digital broadcasting system

This paper presents a fully integrated single-chip direct conversion receiver for DBS system. The receiver tunes 950-2150 MHz wide band using integrated low phase noise VCOs and a fractional-N phase locked loop. Fully programmable 2-58 MHz cut-off frequency channel select filter effectively eliminates out-of-channel jammers to increase the linearity and optimize its performance for the 1-45 Msps variable data rates. A delta-sigma modulated fractional-N synthesizer with low noise quadrature VCOs exhibits phase noise of -76 dBc/Hz at 10 kHz offset. It has a -65 dBm sensitivity with an 80 dB system gain dynamic range. The receiver draws only 100 mA from 1.8 V supply. This low power highly integrated DBS receiver uses a 0.18 /spl mu/m CMOS process.

A 65nm CMOS low-power small-size multistandard, multiband mobile broadcasting receiver SoC

For a few years, new mobile broadcasting services were launched in Korea, Japan, Europe and China. The mobile broadcasting markets are maturing rapidly for applications such as mobile cellular phones, car navigation, PMP and so on. The market drives low-cost, low-power and small size significantly for mobile applications and drives multiple functionality and multiple bands [1]. To meet the market requirements, more integration of system blocks and functionality is needed. To achieve this goal, the 65nm CMOS and multistandard and multiband receiver SoC may be suitable solution.

A 100mW Dual-Band CMOS Mobile-TV Tuner IC for T-DMB/DAB and ISDB-T

A 0.18mum CMOS dual-band low-IF mobile-TV tuner IC for T-DMB/DAB that supports Band-III and L-band is presented. By modifying a few metals and via masks, the IC can support VHF and UHF bands for ISDB-T partial reception. The chip meets all the specifications of both applications with a sensitivity of <-98dBm while consuming 100 mW from a 1.8V supply and occupying 3.4times3.3mm2

A complex band-pass filter for low-IF conversion DAB/T-DMB tuner with I/Q mismatch calibration

This paper provides a complex band-pass filter (BPF) for low-IF conversion digital audio broadcasting (DAB) and terrestrial-digital multimedia broadcasting (T-DMB) tuner with I/Q gain and phase mismatch calibration. This calibration can be implemented in the first stage of complex BPF using feed-through resistor calibration scheme. The automatic tuning circuit with programmable clock is also presented. The measurement results show 1.536 MHz bandwidth with 2.048 MHz IF center frequency and 50 dB stop band attenuation at 0.7 MHz frequency offset. The in-band and out-band 3rd order intermodulation distortion (IMD3) are 55 and 60 dBc, respectively. After I/Q mismatch calibrating, 20 dB image rejection ratio (IRR) improvement is obtained from 38 dB to 58 dB in this work. The automatic tuning circuit guarantees less than +/- 4 % cut-off frequency variation covering the several clock requirements from demodulator ICs. The complex BPF is fabricated in 0.13 mum RF CMOS technology and consumes 9 mA with 1.2 V power supply.

A 43dB ACR low-pass filter with automatic tuning for low-IF conversion DAB/T-DMB tuner IC

This paper provides a channel select low-pass filter with automatic cut-off frequency tuning circuit for low-IF conversion digital audio broadcasting (DAB) and terrestrial-digital multimedia broadcasting (T-DMB) tuner IC. This filter has 1.58MHz cut-off frequency, 20dB and 65dB stop band attenuation at 1.9MHz and 2.4MHz, respectively. The in-band IIP3 is -8.4dBV and 1dB desensitization is satisfied for 490mVpp interferer at 1.7MHz frequency offset. By using simple automatic tuning technique, less than +/-1.5% cut-off frequency error and more than 40dB adjacent channel rejection (ACR) are obtained. The low-pass filter is fabricated in 0.18/spl mu/m CMOS technology and consumes about 4.5mA with 1.8V power supply.

A CMOS Image Rejection Mixer for DAB/DMB Low-IF Tuner IC Exhibiting 41dB Adjacent Channel Rejection Ratio

The image rejection mixer for digital audio broadcasting and digital multimedia broadcasting (DAB/DMB) is described. The mixer is implemented in a 0.18mum six-layer metal CMOS process and occupies a 2.25mm2. To obtain the ultimate level of image rejection without additional tuning, the double quadrature architecture is used and to linearize the RF buffer, differential transconductance linearization technique is used (Tae wook Kim, et al., 2005). The fabricated mixer exhibits 65 dB image rejection ratio, 41dB adjacent channel rejection ratio, 100 kHz ~ 1.65MHz image rejection bandwidth, 16dB gain, 35dBmV input-referred third order intercept point (IIP3), and 15mA current consumption from 1.8V supply