Brady Hunsaker

Maximizing the Efficiency of the U.S. Liver Allocation System Through Region Design

Cadaveric liver transplantation is the only viable therapy for end-stage liver disease patients without a living donor. However, this type of transplantation is hindered in the United States by donor scarcity and rapid viability decay. Given these difficulties, the current U.S. liver allocation policy balances allocation likelihood and geographic proximity by allocating cadaveric livers hierarchically. We consider the problem of maximizing the efficiency of intraregional transplants through the redesign of liver allocation regions. We formulate the problem as a set partitioning problem that clusters organ procurement organizations into regions. We develop an estimate of viability-adjusted intraregional transplants to capture the trade-off between large and small regions. We utilize branch and price because the set partitioning formulation includes too many potential regions to handle explicitly. We formulate the pricing problem as a mixed-integer program and design a geographic-decomposition heuristic to generate promising columns quickly. Because the optimal solution depends on the design of geographic decomposition, we develop an iterative procedure that integrates branch and price with local search to alleviate this dependency. Finally, we present computational studies that show the benefit of region redesign and the efficacy of our solution approach. Our carefully calibrated test instances can be solved within a reasonable amount of time, and the resulting region designs yield a noticeable improvement over the current configuration.

Two-stage integer programs with stochastic right-hand sides: a superadditive dual approach

We consider two-stage pure integer programs with discretely distributed stochastic right-hand sides. We present an equivalent superadditive dual formulation that uses the value functions in both stages. We give two algorithms for finding the value functions. To solve the reformulation after obtaining the value functions, we develop a global branch-and-bound approach and a level-set approach to find an optimal tender. We show that our method can solve randomly generated instances whose extensive forms are several orders of magnitude larger than the extensive forms of those instances found in the literature.

Interconnect customization for a hardware fabric

This article describes several multiplexer-based interconnection strategies designed to improve energy consumption of stripe-based coarse-grain reconfigurable fabrics. Application requirements for the architecture as well as two dense subgraphs are extracted from a suite of signal and image processing benchmarks. These statistics are used to drive the strategy of the composition of multiplexer-based interconnect. The article compares interconnects that are fully connected between stripes, those with a cardinality of 8:1 to 4:1, and extensions that provide a 5:1 cardinality, limited 6:1 cardinality, and hybrids between 5:1 and 3:1 cardinalities. Additionally, dedicated vertical routes are considered replacing some computational units with dedicated pass-gates. Using a fabric interconnect model (FIM) written in XML, we demonstrate that fabric instances and mappers can be automatically generated using a Web-based design flow. Upon testing these instances, we found that using an 8:1 cardinality interconnect with 33% of the computational units replaced with dedicated pass-gates provided the best energy versus mappability tradeoff, resulting in a 50% energy improvement over fully connected rows and 20% energy improvement over an 8:1 cardinality interconnect without dedicated vertical routes.

Interconnect Customization for a Coarse-grained Reconfigurable Fabric

This paper describes several system-level interconnection strategies for a coarse-grained reconfigurable fabric designed for low-energy hardware acceleration. A small, representative sub-graph for signal and image processing applications is used to predict the success of mapping larger applications onto the fabric device with these different interconnection strategies, which include 32:1, 8:1, 5:1, 4:1, 3553:1 (3:1, 5:1, 5:1, 3:1) and 355:1 (3:1, 5:1, 5:1) cardinalities. Three mapping techniques are presented and used to complete mappings onto several of these fabric instances including a mixed integer linear programming technique, a constraint programming approach, and a greedy heuristic. We present results for area (in number of required rows), power, delay, and energy as well as run times for mapping a set of signal and image processing benchmarks onto each of these interconnects. Our results indicate that the 5:1 interconnect provides the best overall results and does not require any additional hardware resources than the baseline 4:1 technique. When compared with other implementation strategies, the reconfigurable fabric energy consumption, using 5:1-based interconnect, is within 5-10X of a direct ASIC implementation, is 10X better than an Virtex II Pro FPGA and is 100X better than an Intel XScale processor.

Simple lifted cover inequalities and hard knapsack problems

We consider a class of random knapsack instances described by Chvatal, who showed that with probability going to 1, such instances require an exponential number of branch-and-bound nodes. We show that even with the use of simple lifted cover inequalities, an exponential number of nodes is required with probability going to 1.

How much do we pay for using default parameters

This paper explores the potential benefit of using tuned parameter settings for integer programming instances. Three metrics are considered for selecting parameters: Time-to-Optimality, Proven-Gap and Best-Integer-Solution. Good parameter settings for each metric are found using the open-source software tool Selection Tool for Optimization Parameters. Computational tests are presented using CPLEX solver (version 9.0) on MIPLIB test instances, showing substantial improvements over the default parameter setting. Although the benefit of a tuned parameter setting on an individual instance is outweighed by the cost of identifying the tuned setting, these results indicate that substantial benefit may be achieved in cases where the cost of tuning parameter settings is justified.

Greedy Algorithms for Mapping onto a Coarse-grained Reconfigurable Fabric 1

This book chapter describes several greedy heuristics for mapping large data-flow graphs (DFGs) onto a stripe-based coarse-grained reconfigurable fabric. These DFGs represent the behavior of an application kernel in a high-level synthesis flow to convert computer software into custom computer hardware. The first heuristic is a limited lookahead greedy approach that provides excellent run times and a reasonable quality of result. The second heuristic expands on the first heuristic by introducing a random element into the flow, generating multiple solution instances and selecting the best of the set. Finally, the third heuristic formulates the mapping problem of a limited set of rows using a mixed-integer linear program (MILP) and creates a sliding heuristic to map the entire application. In this chapter we will discuss these heuristics, their run times, and solution quality tradeoffs. The greedy mapping heuristic follows a top-down approach to provide a feasible mapping for any given application kernel. Starting with the top row, it completely places each individual row using a limited look-ahead of two rows. After each row is mapped, the mapper will not modify the mapping of any portion of that row. This mapping approach is deterministic as it uses a priority scheme to determine which elements to place first based on factors such as the number of nodes to which it connects and second based on the desirability of a particular location in the row. While the limited information available to the mapper does not often allow it to produce optimal or minimum-size mappings, its runtime is typically a few seconds or less. We use a fabric interconnect model (FIM) file in the mapping flow to define a set of restrictions on what interconnect lines are available, the capabilities of particular functional units (e.g. dedicated vertical routes versus computational capabilities) in the system, etc. The greedy heuristic is deterministic in the priority system which it uses to place nodes. The second mapping heuristic we explore is based on this greedy algorithm and introduces randomness into the heuristic to make decisions along the priority list. In the first implementation the node selection order is selected randomly. In the second version, weights are assigned to nodes based on the deterministic placement order. Since the heuristic runs so quickly, we can run the heuristic 10’s or possibly 100’s of times and select the best result. This method is also parameterizable with the FIM.

Polarity and the complexity of the shooting experiment

We exhibit a polar relationship between two measures that have been proposed to evaluate the importance of TSP facets, the Kuhn-Gomory shooting experiment size and the probability of integrality in an augmented LP relaxation. The polarity establishes the complexity of performing the shooting experiment. We illustrate the resulting relationship on the Chinese postman and minimum spanning set problems.