Brendan Peter McGrath

Optimized Design of Stationary Frame Three Phase AC Current Regulators

Current regulation plays an important role in modern power electronic AC conversion systems. The most direct strategy to regulate such currents is to use a simple closed loop proportional-integral (PI) regulator, which has no theoretical stability limits as the proportional and integral gains are increased, since it is only a second order system. However, pulsewidth modulation (PWM) transport and controller sampling delays limit the gain values that can be achieved in practical systems. Taking these limitations into account, this paper presents an analytical method to determine the best possible gains that can be achieved for any class of practical linear AC current controller. The analysis shows that the maximum possible proportional gain is determined by the plant series inductance, the DC bus voltage and the transport and sampling delays, while the maximum possible integral gain is determined primarily by the transport and sampling delays. The work is applicable to stationary frame PI regulators, stationary frame controllers with back electromotive force compensation, stationary frame P+ resonant (PR) controllers, and synchronous d- q frame controllers, since they all have identical proportional and integral gains that must be optimized for any particular application.

Optimal Modulation of Flying Capacitor and Stacked Multicell Converters Using a State Machine Decoder

Modulation of flying capacitor and stacked multicell converters is complicated by the fact that these converters have redundant states that achieve the same phase leg voltage output. Hence, a modulator must use some secondary criteria such as cell voltage balancing to fully define the converter switched state. Alternatively, the modulator can be adapted to directly specify the cell states, such as has been proposed for the harmonically optimal phase disposition (PD) strategy. However the techniques reported to date can lead to uneven distribution of switching transitions between cells, and the synthesis of narrow switched phase leg pulses. This paper presents an improved strategy that decouples the tasks of voltage level selection and switching event distribution. Conventional PD and centered space vector pulsewidth modulation (CSVPWM) strategies are used to define the target voltage level for the converter, and a finite state machine is then used to distribute the transitions to the converter cells in a cyclical fashion. Experimental results for a four-level flying capacitor inverter are presented, verifying that the natural balancing properties of this converter has been preserved, the cell switching utilization is equal and the expected harmonic gains of PD and CSVPWM compared to phase shifted carrier PWM have been achieved

Reduced PWM harmonic distortion for multilevel inverters operating over a wide modulation range

It is known that the optimal carrier based approach for modulating a multilevel converter is to use a phase disposition (PD) carrier arrangement with a common mode offset added to the reference waveforms to centre the implicitly selected space vectors. However, this strategy does not fully utilize all available voltage levels at lower modulation depths, with an odd level system only using odd voltage levels and an even level system only using even voltage levels as the modulation depth varies. Recent work has suggested that this is not the harmonically optimal approach at reduced modulation depths. This paper shows how up to a 40% reduction in harmonic distortion can be achieved if all available voltage levels are used throughout the linear modulation range. The improvement is achieved by adding a simple (1/2) carrier magnitude common mode dc offset in key modulation regions, which allows the converter to use all available voltage levels. The paper uses analytical spectral decomposition and harmonic flux trajectory analysis to propose a theoretical basis for this improvement, and to determine the precise points at which the (1/2) carrier magnitude offset should be added to achieve the harmonic improvement.

A General Analytical Method for Calculating Inverter DC-Link Current Harmonics

Accurate identification of DC fink ripple current is an important part of switched power converter design, since the spectral content of this current impacts on DC bus capacitor lifetime, the stability of the converter control and the EMI performance of the system. Conventionally the RMS magnitude of the ripple current is used to evaluate this impact, but this approach does not readily differentiate between PWM strategies, and can be challenging to evaluate for more complex converter topologies. This paper presents a new generalized approach that analytically determines the harmonic spectrum of the DC link and DC bus capacitor currents for any voltage-source switched converter topology. The principle of the strategy is that the product of a phase leg switching function and its load current in the time domain, which defines the switched current flowing through the phase leg, can be evaluated in the frequency domain by convolving the spectra of these two time varying functions. Since PWM has a discrete line frequency spectrum, this convolution evaluates as an infinite summation in the frequency domain, which reduces to a simple frequency shift of the PWM spectrum when the load current is assumed to be a fundamental single frequency sinusoid. Hence the switched currents flowing through the phase legs of an inverter can be evaluated as a summation of harmonics for any PWM strategy or inverter topology, and can then be readily combined using superposition to determine the DC link and DC bus capacitor currents. The analytical approach has been verified against experimental results for an extensive range of two-level and multi-level converter topologies and PWM strategies.

Predictive Control of a Flying Capacitor Converter

This paper presents a predictive control strategy for single phase flying capacitor converters. The proposed method allows for the regulation of both the output current and the intermediate flying capacitor voltages, achieving transient dynamics that are superior to those in standard pulse width modulation based strategies. By means of an appropriate choice of the associated cost function, the designer is allowed to tradeoff the load current harmonic content, the capacitor voltage balancing and the total number of commutations in a simple fashion. In addition, the strategy permits the enforcement of an arbitrary output voltage spectrum.

Enhanced voltage balancing of a flying capacitor multilevel converter using Phase Disposition (PD) modulation

This paper analyses the natural voltage-balancing characteristic of a three-phase flying capacitor multilevel converter when it is operated under the spectrally optimal Phase Disposition (PD) pulsewidth modulation (PWM) strategy. Using this analysis, it is shown that PD PWM has superior balancing characteristics compared to the phase-shifted carrier PWM strategy, because it places more spectral energy into the differential-mode sideband harmonics that drive the voltage-balancing process. From this understanding, an alternative balance booster filter network connection is proposed that significantly improves the natural balancing response of a flying capacitor converter for either PWM strategy. The analysis is confirmed by extensive simulation and experimental studies.

Improved Stationary Frame AC Current Regulation using Feedforward Compensation of the Load EMF

Current regulation plays a key role in modern power electronic AC conversion systems. The most obvious strategy is to use a simple closed loop PI regulator. However it is well known that this approach cannot achieve zero steady state error because of the instability that inevitably occurs as the PI gains are increased to reduce this error. Linear analysis identifies that an AC load controlled by a PI regulator is a second order system with no theoretical stability limits as the gains are increased. Hence other factors must be responsible for the gain limits that are known to occur in practice. This paper revisits the use of a PI regulator to control AC currents and identifies that it is control loop delays that limit the PI regulator s gains. It is this limit that then constrains the controller s performance, particularly when the system feeds into backemf type loads. Methods are then presented to analytically determine the best possible gains that can be achieved within this constraint, and to improve the performance of a PI regulator by incorporating feedforward compensation of the load backemf into the control loop.

Design of a Soft Switched 6kW Battery Charger for Traction Applications

Auxiliary power converters for traction rolling stock applications have to operate under difficult conditions, including high-input voltages which are subject to wide fluctuations, high temperatures, and harsh environmental constraints. Additionally there is often a need for silent operation, which implies switching frequencies above 20 kHz. Increasingly, high-frequency DC-DC converters are being used for these applications, with their advantages of reduced size and weight. However, the requirement to accommodate high-input voltages and switch at high frequencies is challenging for a conventional hard-switched converter based on IGBTs, which makes soft-switching topologies an attractive alternative. This paper presents the design strategy for a zero-voltage switched (ZVS) 6-kW battery charger switching at 20 kHz using IGBTs. This paper illustrates how the design is a tradeoff between managing the hard-switch turn-on losses at light load, minimizing the duty cycle loss caused by soft-switching delays, and minimizing the effects of tail current-switching losses. These tradeoffs affect the selection of the ZVS capacitors, the determination of the series inductance value, the transformer turns ratio, and the selection of the IGBTs to be used. Design details, theoretical predictions, and experimental results are presented in this paper for the conversion system that was developed.

A General Modulation Strategy for a Five-Level Three-Phase Current Source Inverter with Regulated Intermediate DC Link Currents

Multilevel converters use series/parallelled semiconductor switching devices to synthesise switched waveforms at power levels that are well above individual device ratings. To date, most multilevel inverter research has focused on voltage source structures, primarily because these topologies address the more common high power converter limiting factor of device voltage ratings. However, multilevel current source converters can have advantages in lower voltage, very high current applications, or in situations where, despite their higher losses, DC inductors have reliability benefits compared to electrolytic capacitors. This paper presents an integrated three phase 5-level current source inverter topology that requires only two intermediate link inductors, and shows how it can be controlled by mapping modulation control signals from a multilevel VSI controller. This allows the wealth of existing knowledge relating to modulation of multilevel VSIs to be immediately applied to the multilevel CSI. The mapping process matches space vectors created by the VSI modulation process to equivalent CSI space vectors, and then selects between redundant space vector alternatives to maintain the current balance of the intermediate link inductors. The converter operation has been verified in a detailed circuit simulation taking account of all second order effects.

High performance voltage regulation of current source inverters

Current source inverters offer advantages of voltage boost, short circuit protection, reduced EMI and direct regeneration. While CSI control strategies are less developed than for a VSI, the topologies are functional duals and have much in common in a control sense. In particular, since CSI voltage regulation is the dual of VSI current regulation, current regulation control strategies for a VSI can be readily implemented as equivalent voltage control strategies for a CSI. This paper shows how a high performance PI stationary frame and P+Resonant CSI voltage regulator can be analytically designed and optimised, while in particular taking into account the second order response of a CSI filter/load combination.