Brian L. Swenson

Enhancement and Depletion Mode AlGaN/GaN CAVET With Mg-Ion-Implanted GaN as Current Blocking Layer

Current aperture vertical electron transistor (CAVET) was successfully demonstrated by using Mg-implanted GaN as a current blocking layer for nonalloyed source contacts. A maximum source-drain current of (corresponding to 0.22 A/mm of source) and an extrinsic transconductance of 54 mS/mm of source were achieved. Threshold voltage as high as 0.6 V was realized by plasma exposure for 10 min, increasing the transconductance of the device to 140 mS/mm of source. Thus, a normally off CAVET was demonstrated for the first time. The increase in by plasma exposure for a given bias was due to etching of the AlGaN barrier. The shift of threshold voltage and the varied directly with the time of exposure. There was no significant dispersion in these devices.

CAVET on Bulk GaN Substrates Achieved With MBE-Regrown AlGaN/GaN Layers to Suppress Dispersion

A current aperture vertical electron transistor (CAVET) with a Mg-ion-implanted current blocking layer (CBL) and a channel regrown by plasma assisted molecular beam epitaxy (MBE), is successfully demonstrated on bulk GaN to work as a high voltage device. The fabrication of the device combined a drift region grown by metalorganic chemical vapor deposition (MOCVD), to hold the blocking voltage, with AlGaN/GaN layers regrown by plasma-MBE to conduct current. The device registered a maximum current of 4 kA· cm^-2 under direct-current operation offering a specific on-state resistance <i>R</i>_on - <i>A</i> of 2.2 mΩ·cm². With 80 μs pulses applied to the gate, the devices showed no dispersion. The increased aperture length <i>L</i>_ap resulted in the decrease in specific <i>R</i>_on, as expected. The impact of the gate overlap to aperture <i>L</i>_go on the leakage current was studied, where the leakage current was found to increase with a smaller overlap.

Photoassisted high-frequency capacitance-voltage characterization of the Si3N4/GaN interface

A revised method to measure the interface state density of Si3N4/GaN metal-insulator-semiconductor diodes is reported. The wide band gap of GaN suppresses hole generation at room temperature and consequently allows measurements in deep depletion. Using the method outlined in this paper, the total interface state density can be measured throughout the bandgap above the bias in deep depletion utilizing an above bandgap light source. We report a peak interface state density of 5.0×1012 cm−2 eV−1 at ∼0.3 eV using this procedure, whereas the Terman method reports a peak of <2×1011 cm−2 eV−1 for the same Si3N4/GaN metal-insulator-semiconductor diode without illumination.

Effects of oxidation on surface chemical states and barrier height of AlGaN/GaN heterostructures

The effects of oxidation on the surface structure and chemical bonding states of AlGaN/GaN heterostructures were investigated using x-ray photoelectron spectroscopy (XPS). In comparing Al 2p core-level XPS spectra among as-grown and annealed samples, we found that Al atoms on the surface were highly oxidized after rapid thermal annealing (RTA) at high temperature; not only in an O2 but also in an N2 gas atmosphere. The Al oxidation level was almost identical for the samples annealed at 800 °C, irrespective of the annealing atmosphere and time; yet there was a strong dependence on the annealing temperature. The dependence of surface barrier height on the annealing condition is associated with Al oxidation behavior. Before the RTA, the barrier height increased together with the AlGaN thickness, indicating an unpinned Fermi level and the existence of low-density and distributed surface donor states. After the high-temperature RTA, however, the height is maintained at a certain value, regardless of the thickn...

Current status and scope of gallium nitride-based vertical transistors for high-power electronics application*

Gallium nitride (GaN) is becoming the material of choice for power electronics to enable the roadmap of increasing power density by simultaneously enabling high-power conversion efficiency and reduced form factor. This is because the low switching losses of GaN enable high-frequency operation which reduces bulky passive components with negligible change in efficiency. Commercialization of GaN-on-Si materials for power electronics has led to the entry of GaN devices into the medium-power market since the performance-over-cost of even first-generation products looks very attractive compared to todays mature Si-based solutions. On the other hand, the high-power market still remains unaddressed by lateral GaN devices. The current and voltage demand for high-power conversion application makes the chip area in a lateral topology so large that it becomes difficult to manufacture. Vertical GaN devices would play a big role alongside silicon carbide (SiC) to address the high-power conversion needs. In this paper vertical GaN devices are discussed with emphasis on current aperture vertical electron transistors (CAVETs) which have shown promising performance. The fabrication-related challenges and the future possibilities enabled by the availability of good-quality, cost-competitive bulk GaN material are also evaluated for CAVETs.

Distribution of donor states on etched surface of AlGaN/GaN heterostructures

The dependence of electron density (ns) on AlGaN barrier thickness (dAlGaN) was studied for AlGaN/GaN single heterostructures whose dAlGaN was controlled by low-power Cl-based reactive ion etching (RIE) instead of growth. The samples showed a constant increase not only in ns but also in AlGaN surface barrier height (eϕB) with dAlGaN, indicating the existence of low-density and distributed donor states on the AlGaN surface. Such a distribution of donor states differs from the commonly accepted model based on high-density and single-level surface donor states as the source of electrons in the two-dimensional electron gas (2DEG). The presence of a distribution of donor states is confirmed by first-principles calculations for a variety of surface structures for oxidized AlGaN surfaces. Donor states arise from areas of the surface that deviate from the electron-counting rule, leading to occupied surface states in the upper half of the band gap. The oxide formed on the surface after RIE results in a low-density...

Enhancement-Mode N-Polar GaN MISFETs With Self-Aligned Source/Drain Regrowth

We report gate-first enhancement-mode (E-mode) N-polar GaN MISFET devices with self-aligned source/drain regions by molecular beam epitaxy regrowth and with a SiNx gate dielectric. E-mode operation at Vds = 4.0 V is demonstrated for devices with gate lengths >; 0.18 μm with a 20-nm GaN channel and a high-temperature SiNx gate dielectric. A high drain current of 0.74 A/mm was measured for an Lg = 0.62-μm device with a peak transconductance of 225 mS/mm and a positive threshold voltage of 1 V. The on resistance of the device was 2 Ω·mm. Devices show short-channel effect with decreasing gate lengths.

N-Face Metal–Insulator–Semiconductor High-Electron-Mobility Transistors With AlN Back-Barrier

We present a high-performance SiN/AlGaN (cap)/GaN (channel)/AlN (barrier)/GaN (buffer) metal-insulator-semiconductor high-electron-mobility transistor grown on the N-face, in which the 2-D electron gas (2DEG) is induced at the top GaN/AlN interface. The use of AlN eliminates alloy disorder scattering to the 2DEG and provides strong back-barrier confinement of the 2DEG under high electric fields for device scaling. Devices with 0.7-mum gate length showed a current-gain cutoff frequency (fT) of 17 GHz and a power-gain cutoff frequency (f max) of 37 GHz. A continuous-wave output power density of 7.1 W/mm was measured at 4 GHz, with 58% power-added efficiency and a large-signal gain of 15.3 dB at a drain bias of 35 V.

Capacitance-voltage characterization of interfaces between positive valence band offset dielectrics and wide bandgap semiconductors

A photo-assisted capacitance voltage (C-V) characterization technique for interfaces between positive valence band offset dielectrics (Al2O3, SiO2) and wide bandgap semiconductors is presented. It is shown that the valence band barrier for holes at the interface affects the measurement and a method to extract border trap and interface state density values from the measured C-V curves is suggested. Dielectric-semiconductor interface characterization has been well studied for silicon but the characterization techniques are not transferable to wide bandgap semiconductors, such as GaN and SiC, due to the low minority carrier generation rate. Multiple dielectrics deposited by various techniques have been employed in these devices; but in order to ascertain the most suitable dielectric, an effective characterization technique that works well with dielectrics on wide-bandgap semiconductors is required.

Interface states at the SiN/AlGaN interface on GaN heterojunctions for Ga and N-polar material

Dielectric passivation is important to improve the stability and reliability of gallium nitride based semiconductor devices. We need to characterize various dielectrics and their interfaces to nitrides accurately to be able to exploit the benefits efficiently. Earlier, B. L. Swenson and U. K. Mishra [J. Appl. Phys. 106, 064902 (2009)] have detailed a photo-assisted high frequency CV characterization technique for the Ga-polar SiN/GaN interface that gives an accurate value of interface state density (Dit) across the bandgap of the dielectric. In this work, we extend the technique to study the interface states at the SiN/AlGaN interface on GaN for Ga and N polar material. This simulates the AlGaN/GaN HEMT structure. A MIS-type structure comprised of a metal on SiN on an AlGaN/GaN heterojunction was used for the study. For a structure with 1 nm AlGaN interlayer, a peak interface state density of 2.8 × 1012 cm−2 eV−1 was measured. For Ga polar devices, the measured Dit decreases with increasing AlGaN thicknes...