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Bruce Ernest Whittaker

Unisys

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Publication

Featured researches published by Bruce Ernest Whittaker.

Archive | 1985

Power control network for multiple digital modules

Bruce Ernest Whittaker; James Henry Jeppesen; Larry Dewayne Sharp

Archive | 1998

Multi set cache structure having parity RAMs holding parity bits for tag data and for status data utilizing prediction circuitry that predicts and generates the needed parity bits

Bruce Ernest Whittaker

Archive | 1996

Cache invalidation sequence system utilizing odd and even invalidation queues with shorter invalidation cycles

Saul Barajas; David M. Kalish; Bruce Ernest Whittaker; Keith Saldanha

Archive | 1985

Power control network using reliable communications protocol

James Henry Jeppesen; Bruce Ernest Whittaker

Archive | 1993

Storage queue with adjustable level thresholds for cache invalidation systems in cache oriented computer architectures

Saul Barajas; David M. Kalish; Bruce Ernest Whittaker

Archive | 1992

System for halting synchronous digital modules

James Henry Jeppesen; Bruce Ernest Whittaker

Archive | 1995

System for adapting maintenance operations to JTAG and non-JTAG modules

James Henry Jeppesen; Bruce Ernest Whittaker

Archive | 1990

Multiprocessor multifunction arbitration system with two levels of bus access including priority and normal requests

Bruce Ernest Whittaker; Saul Barajas; Leland E. Watson

Archive | 1998

Pre-arbitration system allowing look-around and bypass for significant operations

Bruce Ernest Whittaker

Archive | 1990

Clocked logic circuitry preventing double driving on shared data bus

Bruce Ernest Whittaker; Saul Barajas; Leland E. Watson

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James Henry Jeppesen

Unisys

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Saul Barajas

Unisys

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Leland E. Watson

Unisys

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David M. Kalish

Unisys

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Larry Dewayne Sharp

Unisys

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Andrew Ward Beale

Unisys

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Donald M. Kalish

Unisys

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Keith Saldanha

Unisys

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