Bruno Levrier

Operational Performances Demonstration of Polymer-Ceramic Embedded Capacitors for MMIC Applications

Embedded passives are becoming increasingly important for the manufacture of highly integrated electronic boards and packages. The need for embedded passives emerges from the growing consumer demand for product miniaturization thus requiring smaller components and space efficient packaging. This can be realized by replacing discrete components that demand a higher volume than embedded passives. Embedded passives have already been investigated in the last few years. However, nowadays used dielectric materials have to be optimized in order to improve the performances of the passive components in terms of dielectric behavior and reliability. The most promising candidates for dielectric materials applied for embedded passives are polymer-ceramic nanocomposites. In this paper, the robustness of embedded capacitors using such commercial dielectrics regarding the environmental conditions (temperature and humidity) is studied. Microwave measurements performed on an embedded structure design for low noise amplifier microwave monolithic integrated circuit decoupling allow to demonstrate clearly the capacity of this new technology.

Defect detection in multilayer ceramic capacitors

Abstract Cracks in Multilayer Capacitors are often latent defects, which are not recognized in production, but can cause substantial problems in field. Therefore it is important to find possibilities to detect those candidates before delivering electronic equipment. In this work, cracked capacitors were characterized by electrical parameter testing and by piezoelectric spectroscopy. As a new method, sound emission spectroscopy was employed as indicator for latent defects and correlated with electrical data and physical analysis. The results show that sound emission used on a statistical basis and piezoelectric response might be effective to screen latent defects in electronic control units.

Thermomechanical stress analysis of copper/silicon interface in Through Silicon Vias using FEM simulations and experimental analysis

This paper reports results on FEM modeling in order to calculate stress distribution at the Cu/Si boundary of TSVs after the fabrication process (annealing) using ANSYS software. Residual interfacial shear stress is estimated to be close of 200MPa for a 5μm radius circular copper filled TSVs while Von-Mises simulations give a radial distribution with a maximum above 500MPa around the TSV. All these results are in good agreement with those recently published by E. Suhir on same configuration. Experimental detection and characterization capability of stress distribution around the circular TSV have been conducted by Scanning Acoustic Microscopy (SAM) technique in C-SCAN mode using specifically shear wave mode imaging. We demonstrated that such an analysis can provide complementary information on stress analysis in contrast of classical C-SCAN longitudinal imaging mode. Micro-Raman spectroscopy has been also used to measure the stress profile into the silicon wafer around the circular TSV under Laser illumination by monitoring the wavelength shift of the Raman peak.

Predicted size of the inelastic zone in a ball-grid-array (BGA) assembly

Simple and easy-to-use analytical (mathematical) predictive model has been developed for the assessment of the size of an inelastic zone, if any, in a ball-grid-array (BGA) assembly. The solder material is considered linearly elastic at the strain level below the yield point and ideally plastic above this level. The numerical example carried out for a 30mm long surface-mount package with a 200 micrometer thick lead-free solder has indicated that, in the case of a high expansion PCB substrate, about 7.5% of the interfaces length experiences inelastic strains, while no such strains occur in the case of a low expansion ceramic substrate. The FEA computations confirmed this result. The suggested model can be used to check if a zone of inelastic strains exists indeed in the design of interest, and if inelastic strains can be avoided by using a low expansion board or by some other means (say, by using different bonding material at the assembly ends). If not, the model can be used to determine the size of the inelastic zone. It is advisable that such an assessment is carried out prior to the application of a Coffin-Manson-type of an equation (such as, e.g., Anands model employed in the ANSYS software) aimed at the evaluation of the BGA material lifetime.

Use of signal processing imaging for the study of a 3D package in harsh environment

Abstract Assembly technologies follow the reduction in size of circuit board components and correlatively the number of active layers increases significantly. Therefore, during a conventional acoustic analysis, the obtained image becomes more and more complicated to analyze. In a previous paper, we focused our research on a method for a suitable visualization of the timescale of an acoustic signal (CWT). In this paper we present the use of the non-destructive control for the study of a 3D package submitted to accelerated ageing tests using harsh conditions.

Scanning acoustic microscopy and shear wave imaging mode performances for failure detection in high-density microassembling technologies

This paper reports results on application of scanning acoustic microscopy (SAM) for analysis of high-density microassembling technologies such as BGA and TSV. We have demonstrated the interest of an original and dedicated model based on the calculations of the in-depth Point-Spread Function (namely PSF) corresponding to an extension of that of proposed in literature but restricted to the surface of an object. Our model includes the well-known decomposition of an acoustic wave into a solid specimen but also diffraction, calculations of geometrical aberrations and can predict the focal plane distribution (lateral resolution) at a specific focus depth according the Rayleigh diffraction theory. Specific test patterns have been used for metrology evaluation into different materials especially at high acoustic velocities. A specific attention is paid to the application of shear wave imaging capabilities in comparison of longitudinal wave imaging mode for the analysis of stress distribution along an interface from a qualitative point of view believing that one can provide complementary information on stress analysis in contrast of classical B or C-SCAN longitudinal imaging mode. Finally, some applications are given on the well-established Ball-Grid-Array (SBC-BGA) technology still remaining an interest in todays electronic packaging technology and then on a specific TSV design that is currently studied in the framework of the European “MASTER_3D” project. FEM modeling and analytical predictive stress model, implemented and reported in recent published papers, have been compared with SAM imaging results. Non-destructive micro-Raman spectroscopy is also considered to estimate the stress profile into the silicon wafer around circular TSVs by monitoring the wavelength shift of the Raman peak along the radial distance.

Reliability assessment: New tools for the next generation of packages

Reliability assessment of components, integrated circuits, and microassemblies is clearly identified as a major factor in the on-going development of microelectronics. Since the last decade, the 3-D packaging and interconnections have emerged, and integrated packages have been developed. System-in-package (SIP) has become the principal support for integrated systems. Numerous problems are linked to their decreasing dimensions, the increasing numbers of interfaces (multichips stacked one on top of another), and plastic packages that must tolerate higher temperatures (RoHS). How is the reliability of such components assessed? What are the tools to investigate failure mechanisms in these new packages? This article gives some solutions mixing acoustic analysis, x-ray microscopy, electrical testing, and the use of specific tests points (sensors) placed in the package.

Study of degradations in PCB interconnections for high frequency applications

In this paper, we investigate a second-category method to evaluate the degradations of high frequency interconnections on FR4 boards. More than the defects location, the purpose of the present study is to distinguish the effects of the copper metallization corrosion (oxidation, delamination, etc..) from the /spl epsiv//spl tau/ sensitivity to moisture absorption of the laminated substrate. The test structures are based on elementary resonant circuits, which have been submitted to different accelerated aging tests. The resonance characteristics of these structures are very sensitive to the technological parameters and allow an early detection of damages.