Bruno Pimentel

Multimedia Tools and Architectures for Hardware/Software Co-Simulation of Reconfigurable Systems

The paper describes novel multimedia tools and architectures for hardware/software co-simulation of reconfigurable systems. The main contributions are provided in the following three areas: 1) multimedia tools making it possible to manage animated graphical objects for virtual simulation of real world physical objects in the scope of reconfigurable system design; 2) a remotely accessible prototyping system, which is very helpful for both solving the problems of hardware design and supporting multimedia systems which can be used in vast varieties of practical applications, the most important of which are engineering training and education; 3) design methodology based on physical circuits and virtual objects. A number of illustrative examples demonstrating capabilities of the proposed approach are presented and discussed.

Design tools for reconfigurable embedded systems

This paper describes the developed hardware/software tools, libraries and design methods for FPGA-based embedded systems which include: a kernel prototyping board with the Xilinx Spartan 3 FPGA; a set of projects for reusable FPGA-based circuits; utilities for FPGA programming; software/hardware tools that provide support for reconfiguration; and programs enabling the designers to partition the functionality of the developed system between software, running on a PC computer, and hardware, implemented in FPGA. A special attention has been paid to data exchange between a host computer and the kernel prototyping board based on compression/decompression techniques. Examples of practical applications are also presented.

A prototyping system for mobile devices

The paper discusses an FPGA-based prototyping system with both wired and wireless programming and data exchange facilities. The system can be efficiently used for different types of portable devices. For example, it can supply additional interfaces to mobile computers; can be seen as a hardware accelerator for solving computationally complex problems or serve as a base for portable embedded applications. The system includes an extendable core prototyping board, development tools and supplementary software. The board is designed in such a way that it provides direct support for reconfiguration and self-reconfiguration. It can also be employed for virtual prototyping systems that require more resources that the capacity of the onboard FPGA. The supplementary software includes all necessary drivers and interfaces to interact with the board. The development tools are targeted to design space exploration and they consist of hardware description language libraries, design templates, IP cores, software models and multimedia applications. The latter are mainly used for different types of experiments and for hardware/software partitioning.

Hardware/Software Implementation of FPGA-Targeted Matrix-Oriented SAT Solvers

The paper describes two methods for the design of matrix-oriented SAT solvers based on data compression. The first one provides matrix compression in a host computer and decompression in an FPGA. It is shown that although some improvements have been achieved in this case, there exists a better solution. The second method makes possible to execute operations required for solving the SAT problem over compressed matrices.

Recursion in Hardware: Applicability and Implementation Strategies

It is widely accepted that, for certain classes of algorithms, recursion provides clean, concise, elegant, and robust designs that are easy to conceive, understand, and modify with minimal design costs. Its advantages and disadvantages when compared to iteration are well known in software applications. Strategies for implementing recursion in hardware have started to be proposed only recently and they may lead to different results, not only when compared to recursion in software, but also with each other. This paper illustrates the applicability of recursive algorithms in solving computationally intensive problems, namely with the implementation of backtracking search algorithms. Then, a careful analysis of the most relevant strategies for implementing recursion in hardware is carried out, highlighting and comparing the advantages and limitations which can be found amongst them.