Byung-ki Kim

White‐Light‐Emitting Diodes with Quantum Dot Color Converters for Display Backlights

Quantum dots (QDs) have attracted great attention as good candidate for the next generation displays due to their narrow emission, and high luminescence efficiency, and tunable emission covering all visible range. However, QDs easily lost their initial optical properties during the process for a device fabrication and practical operation. We synthesized well passivated green and red light emitting QDs that show almost 100% of QE. When the highly luminescent green and red light emitting QDs were applied as color converters in InGaN blue LEDs, resulting cool white QD-LEDs showed 41lm/W and more than 100% of color reproducibility compared to NTSC standard in CIE1931 and maintained their optical properties for a long time operation. We also demonstrated a 46-inch LCD panel using the white QDLED backlight was successfully demonstrated (Figure).

Pd-nanocrystal-based nonvolatile memory structures with asymmetric SiO2∕HfO2 tunnel barrier

Pd nanocrystals (NCs) on asymmetric tunnel barrier (ATB) composed of stacked SiO2 and HfO2 layers have been employed for nonvolatile memory devices. The Pd-NC layers are formed by electrostatic self-assembly of negatively charged colloidal Pd NCs. The presence of isolated Pd NCs of ∼5nm embedded in HfO2 is confirmed by scanning and transmission electron microscopy images. Outstanding program∕erase (P∕E) properties from C‐V curves are observed with a memory window of 6V under ±17V. Extrapolation of the data up to ten years shows that the flatband voltage drops at the P∕E levels are maintained within only 1.0∕0.5V, respectively, resulting from the efficient data retention based on the ATB. These results are promising enough for the memory structure to be utilized for the multilevel charge storage.

20nm DRAM: A new beginning of another revolution

For the first time, 20nm DRAM has been developed and fabricated successfully without extreme ultraviolet (EUV) lithography using the honeycomb structure (HCS) and the air-spacer technology. The cell capacitance (Cs) can be increased by 21% at the same cell size using a novel low-cost HCS technology with one argon fluoride immersion (ArF-i) lithography layer. The parasitic bit-line (BL) capacitance is reduced by 34% using an air-spacer technology whose breakdown voltage is 30% better than that of conventional technology.

Characteristics of ALD HfSiO/sub x/ using new Si precursors for gate dielectric applications

We have successfully developed a process for ALD HfSiO/sub x/ that can provide excellent compositional control by using new Si precursors, Si/sub 2/Cl/sub 6/ (HCDS) and SiH[(CH/sub 3/)/sub 2/]/sub 3/ (tDMAS). In addition, comparisons of electrical properties of HfSiO/sub x/ using two Si precursors have been performed. CMOSFET with HfSiO/sub x/ using HCDS results in better reliability characteristics than tDMAS. Superior electron and hole mobility (100% and 90% of universal curve at 0.8MV/cm) are also achieved with HCDS. Consequently, HCDS has the potential to be used as a Si precursor for ALD HfSiO/sub x/.

Soft-chemistry Route to P-I-N Heterostructured Quantum Dot Electroluminescence Device: All Solution-processed Polymer-Inorganic Hybrid QD-EL Device

p-i-n heterostructured quantum-dot electroluminescence (QD-EL) device was fabricated by soft-chemical process, which shows a low turn-on voltage comparable to OLEDs. To construct the multilayered device structure, p-type polymer semiconductor was deposited on the ITO glass by sequential process of coating and thermal curing, thereupon a few monolayers of QD was spin-coated. n -type metal-oxide film was deposited on top of the QD luminescence layer by sol-gel method, providing a facile and low-cost route for the ETL fabrication. Prior to solution-processed ETL construction, a post-treatment is performed using cross-linking agent, in order to chemically-immobilize the QDs. As a cathodic electrode, relatively air-stable aluminum was deposited. The constituent material as well as the electronic band structure of the integrated device guarantees operating stability in air and low turn-on voltage.

Characterization of Pd-nanocrystal-based nonvolatile memory devices

Charge loss rate of Pd-nanocrystal (NC)-based nonvolatile memories is reduced about 60% by employing an asymmetric tunnel barrier composed of stacked SiO₂ and HfO₂ layers or insulating ZrO₂ NCs between Pd NCs.