Byung Ryul Ryum
Electronics and Telecommunications Research Institute
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Solid-state Electronics | 1996
Byung Ryul Ryum; T.-H. Han
Abstract Using Si SiGe heteroepitaxy grown by solid-sources (SS) molecular beam epitaxy (MBE) on LOCOS-patterned wafers, an n-p-n Si/SiGe/Si heterojunction bipolar transistor (HBT) which is isolated by a polysilicon-filled trench has been fabricated. Unlike other SiGe HBTs using a metallic salicide process, in this proposed device a titanium disilicide (TiSi2) base electrode layer is formed by deposition and patterning of an amorphous TiSi2.x (x = 0–0.9) layer on the SiGe base layer using selective wet etching. In view of a lower thermal budget furnace annealing at 840°C has only been applied for the drive-in and activation of arsenic (As) implanted in the polysilicon-emitter. The Si/Si0.85Ge0.15/Si n-p-n HBT with a 1 × 4 μm2 mask size emitter typically shows a common-emitter current gain of 118, an Early voltage in the range of 150–170 V, a breakdown voltage BVceo of 7.8 V, a unity current gain frequency fT of 20 GHz, and a maximum oscillation frequency fmax of 15 GHz. Considering the theoretical limit of fT vs BVceo, the performance of our device is near the limit and demonstrates a potential for high frequency analog IC applications.
Archive | 1998
Byung Ryul Ryum; Deok Ho Cho; Tae Hyeon Han; Soo-Min Lee
Archive | 1997
Deok Ho Cho; Soo-Min Lee; Tae Hyeon Han; Byung Ryul Ryum; Kwang Eui Pyun
Archive | 2001
Byung Ryul Ryum; Tae Hyeon Han; Soo-Min Lee; Deok Ho Cho
Archive | 1999
Byung Ryul Ryum; Tae Hyeon Han; Soo-Min Lee; Deok Ho Cho
Archive | 2001
Tae-Hyeon Han; Byung Ryul Ryum; Soo-Min Lee; Deok-Ho Cho
Solid-state Electronics | 1994
Sung-ihl Kim; Byung Ryul Ryum; Sang-Won Kang; Wonchan Kim
Etri Journal | 1994
Byung Ryul Ryum; Sung-ihl Kim
Archive | 2000
Byung Ryul Ryum; Tae Hyeon Han; Soo-Min Lee; Deok Ho Cho
Archive | 2000
Tae-Hyeon Han; Byung Ryul Ryum; Soo-Min Lee; Deok-Ho Cho