Byungjun Ahn

Design and implementation of IPC network in ATM switching system

This paper presents an inter-processor communication network (IPC net) for an ATM switching system. In order to provide a stable and independent path for the communication between processors in the system, an additional network (i.e., Ethernet) is implemented. An Ethernet switch binds processors into a work group. The IPC network proposed in this paper assures end-to-end inter-processor connection and uniform 76-98 Mbits/s bandwidth without disturbing the user cell flow of the ATM switch. Advantages of the implemented Ethernet IPC network against other IPC mechanisms (e.g., cell bus etc.) are presented in this paper. Also, stability and expected performance were verified by experiments.

The design of congestion manageable multiprocessor interconnects in a high capacity router

This paper is about multiprocessor interconnects for a high capacity router. In the multiprocessor communication, most transfers are from one port to the other ports or the opposite direction (usually between a main processor and local processors on line cards). Congestion may happen when inter-processor communication packets from local processors are simultaneously heading for a main processor. In order to manage or alleviate the congestion, bandwidth for inter-processor communication should be increased and QoS mechanisms should be introduced in multiprocessor interconnects. This study suggests three ways to build multiprocessor interconnects and discusses them in the view of congestion handling ability and implementation feasibility.

Next-Hop Selection Algorithm over ECMP

A novel algorithm for next-hop selection over a set of equal cost multiple paths (ECMP) in a router is presented, which provides for load sharing among multiple routes. The main idea of proposed algorithm called prime number modulo-N (PMN) is that the remainders are distributed equally when the multiples of a number are divided by prime number. Based on this specific property, PMN assigns incoming flows to a next-hop selected. The hashed value of flow is divided by the number of multiple paths. If a next-hop pointed the remainder is available, this next-hop selected to forward packet. But if not, prime number not exceeding the remainder divides the hashed value and a next-hop is selected using this remainder. The disruption characteristic is remarkably improved using prime number division scheme The lookup performance of PMN is an optimal O(1) and disruptive behavior is between 0.14 and 0.54 in case N is the number of next-hops and N is equal to eight. And the disruption average of PMN is 0.32. In case N is equal to sixteen, disruptive behavior is between 0.07 and 0.61 and the disruption average is 0.26. The optimal disruption average is 0.16 where N is equal to sixteen. As compared with other algorithm decided which next-hop to use, the performance of PMN like modulo-N is an optimal O(1), disruptive behavior of PMN is better than that of modulo-N and that of hash-threshold algorithm. But highest random weight (HRW)s disruptive behavior with 1/N is better than that of PMN. Load balancing per flow is nearly good if each flow has the same distribution in input packet streams

Providing flexible redundancy for an ATM access switch system

ATM switches require stringent reliability and availability even for access nodes. Carrier class ATM switches fulfill this requirement by employing expensive and sophisticated fault tolerant architectures. However, access switch systems are relatively cheap and compact. Most access switches support fundamental system reliability by providing redundancy for common parts of a system (e.g., switch fabric, power etc.). In addition to providing reliable connection to the core switch systems, access switch systems also need to support various customer premises services. Depending on the need of the network provider, highly reliable line redundancy is more important than the switching capacity of the access system or vice versa. This paper presents an implementation of an ATM switch that provides flexible line card redundancy and scalable switching capacity. Switching capacity of the system is scalable up to 10 Gbps from 5 Gbps depending on the configuration of line card redundancy.

On algorithms for minimum-cost quickest paths with multiple delay-bounds

The quickest path problem deals with the transmission of a message of size σ from a source to a destination with the minimum end-to-end delay over a network with bandwidth and delay constraints on the links. We adapt properties of the quickest path to solve the delay-bounded minimum-cost (DBMC) path problem that is known to be the NP-hard. In this paper, we propose two efficient and simple algorithms, DBMCQP and DBMCQRT. DBMCQP computes a DBMC quickest path for a given message size σ with O(rm + rnlogn), and DBMCQRT construct DBMC routing tables taking into account multiple delay-bounds for any size of message with O(kr2), where r, n, m, and k are the number of distinct link-bandwidths, nodes, links of the network, and the number of delay-bounds, respectively.

Multiple Path Selection Algorithm using Prime Number

A novel algorithm for next-hop selection over a set of equal cost multiple paths (ECMP) in a router is presented, which provides for load sharing among multiple routes. The main idea of proposed algorithm called prime number modulo-N load balance (PMN-LB) is that the remainders are distributed equally when the multiples of a number are divided by prime number. Based on this specific property, PMN-LB assigns incoming flows to a next-hop selected. The hashed value of flow is divided by the number of multiple paths. If a next-hop pointed the remainder is available, this next-hop selected to forward packet. But if not, the prime number not less than the number of available multiple paths divides the hashed value and a next-hop is selected using this remainder. If the previous calculation is failed, the hashed value is divided by the number of available multiple paths. The disruption characteristic is remarkably improved using prime number division scheme. The lookup performance of PMN-LB is an optimal O(1) and disruptive behavior is between 0.125 and 0.500 in case N is the number of next-hops and N is equal to eight. As compared with other algorithm decided which next-hop to use, the performance of PMN-LB like modulo-N is an optimal O(1), disruptive behavior of PMN-LB is better than that of modulo-N and that of hash-threshold algorithm. But highest random weight (HRW)s disruptive behavior with 1/N is better than that of PMN-LB. The load balancing between next-hops is nearly good

Redundant multiprocessor interconnects for the high capacitor router built on ATCA

This paper is about multiprocessor interconnects for the high capacity router built on ATCA (advanced telecom computing architecture) platform. Multiprocessor inter-connection in ATCA brings some design issues when it comes to satisfy the constraint and specification of ATCA platform. In the multiprocessor communication, most transfers are from one port to the other ports or the opposite direction (usually between a main processor and local processors on line cards). Congestion may happen when inter-processor communication packets from local processors are simultaneously heading for a main processor. In order to manage or alleviate the congestion, bandwidth for inter-processor communication should be increased and QoS mechanisms should be introduced in multiprocessor interconnects. This study suggests several methods to build multiprocessor interconnects in ATCA and discusses them in the view of redundancy, congestion handling ability, and implementation feasibility

Design and implementation of redundant multiprocessor interconnects in a high capacity router

This paper is about multiprocessor interconnects for the high capacity router built on ATCA (advanced telecom computing architecture) platform. Multiprocessor interconnection in ATCA brings some design issues when it comes to satisfying the constraint and specification of the ATCA platform. In the multiprocessor communication, most transfers are from one port to the other ports or the opposite direction (usually between a main processor and local processors on line cards). Congestion may happen when interprocessor communication packets from local processors are simultaneously heading for a main processor. In order to manage or alleviate the congestion, bandwidth for interprocessor communication should be increased and QoS mechanisms should be introduced in multiprocessor interconnects. This study suggests several methods to build multiprocessor interconnects in ATCA and discusses them in the view of redundancy, congestion handling ability, and implementation feasibility

The design of multiprocessor interconnects in a high capacity router

This paper is about multiprocessor interconnects for a high capacity router. In the multiprocessor communication, most transfers are from one port to the other ports or the opposite direction (usually between a main processor and local processors on line cards). Congestion may happen when interprocessor communication packets from local processors are simultaneously heading for a main processor. In order to manage or alleviate the congestion, bandwidth for interprocessor communication should be increased and QoS mechanisms should be introduced in multiprocessor interconnects. This study suggests three ways to build multiprocessor interconnects and discusses them in the view of congestion handling ability and implementation feasibility

On bandwidth adjusted multicast in pipelined routing architecture for mobile environment

We have developed a novel algorithm to adjust link-bandwidths of a given multicast tree, which sends a message with size r from a source to a multiple destinations taking into consideration pipelined routing architecture for the mobile environment. The algorithm that we have developed tries to minimize the end-to-end delay time and resources such as bandwidths of a multicast tree, and performs admirably well in any given multicast tree. Our evaluation shows that the proposed algorithm dramatically reduces the end-to-end delay time and resources reserved to satisfy the time-constraints.