C.D. Sheraw
Pennsylvania State University
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Featured researches published by C.D. Sheraw.
Applied Physics Letters | 2002
C.D. Sheraw; Lisong Zhou; J.R. Huang; D. J. Gundlach; Thomas N. Jackson; Michael G. Kane; Ian G. Hill; M. S. Hammond; J. Campi; B.K. Greening; J. Francl; John L. West
We have fabricated organic thin-film transistor (OTFT)-driven active matrix liquid crystal displays on flexible polymeric substrates. These small displays have 16×16 pixel polymer-dispersed liquid crystal arrays addressed by pentacene active layer OTFTs. The displays were fabricated using a low-temperature process (<110 °C) on flexible polyethylene naphthalate film and are operated as reflective active matrix displays.
IEEE Electron Device Letters | 2000
M. G. Kane; J. Campi; M. S. Hammond; F.P. Cuomo; B.K. Greening; C.D. Sheraw; J.A. Nichols; D. J. Gundlach; J.R. Huang; Chung-Chen Kuo; Lili Jia; Hagen Klauk; Thomas N. Jackson
We have fabricated and characterized analog and digital circuits using organic thin-film transistors on polyester film substrates. These are the first reported dynamic results for organic circuits fabricated on polyester substrates. The high-performance pentacene transistors yield circuits with the highest reported clock frequencies for organic circuits.
international electron devices meeting | 2006
Shreesh Narasimha; K. Onishi; Hasan M. Nayfeh; A. Waite; M. Weybright; J. Johnson; C. Fonseca; D. Corliss; C. Robinson; M. Crouse; D. Yang; C.-H.J. Wu; A. Gabor; Thomas N. Adam; I. Ahsan; M. Belyansky; L. Black; S. Butt; J. Cheng; Anthony I. Chou; G. Costrini; Christos D. Dimitrakopoulos; A. Domenicucci; P. Fisher; A. Frye; S. M. Gates; S. Greco; S. Grunow; M. Hargrove; Judson R. Holt
We present a 45-nm SOI CMOS technology that features: i) aggressive ground-rule (GR) scaling enabled by 1.2NA/193nm immersion lithography, ii) high-performance FET response enabled by the integration of multiple advanced strain and activation techniques, iii) a functional SRAM with cell size of 0.37mum2, and iv) a porous low-k (k=2.4) dielectric for minimized back-end wiring delay. The list of FET-specific performance elements includes enhanced dual-stress liner (DSL), advanced eSiGe, stress memorization (SMT), and advanced anneal (AA). The resulting PFET/NFET Idsat values, at Vdd of 1.0V and 45nm GR gate pitch, are 840muA/mum and 1240muA/mum respectively. The global wiring delay achieved with k=2.4 reflects a 20% reduction compared to k=3.0
international electron devices meeting | 2012
Shreesh Narasimha; Paul Chang; C. Ortolland; David M. Fried; E. Engbrecht; K. Nummy; Paul C. Parries; Takashi Ando; M. Aquilino; N. Arnold; R. Bolam; J. Cai; Michael P. Chudzik; B. Cipriany; G. Costrini; Min Dai; J. Dechene; C. DeWan; B. Engel; Michael A. Gribelyuk; Dechao Guo; G. Han; N. Habib; Judson R. Holt; Dimitris P. Ioannou; Basanth Jagannathan; D. Jaeger; J. Johnson; W. Kong; J. Koshy
We present a fully-integrated SOI CMOS 22nm technology for a diverse array of high-performance applications including server microprocessors, memory controllers and ASICs. A pre-doped substrate enables scaling of this third generation of SOI deep-trench-based embedded DRAM for a dense high-performance memory hierarchy. Dual-Embedded stressor technology including SiGe and Si:C for improved carrier mobility in both PMOS and NMOS FETs is presented for the first time. A hierarchical BEOL with 15 levels of copper interconnect including self-aligned via processing delivers high performance with exceptional reliability.
MRS Proceedings | 1999
C.D. Sheraw; D. J. Gundlach; Thomas N. Jackson
We have investigated the polymeric insulators benzocyclobutene (BCB), parylene C and polyimide for use as gate dielectrics in pentacene organic thin film transistors (TFTs). Atomic force microscopy (AFM) was used to examine the surface roughness of the polymeric dielectrics and the morphology of pentacene films deposited onto them. X-ray diffraction was used to examine the molecular ordering of pentacene films deposited onto the polymeric dielectrics. We find a correlation between the surface roughness of the gate dielectric and the grain size in deposited pentacene films, with smooth surfaces yielding larger, more dendritic grains. Despite significant changes in film morphology, pentacene TFTs using BCB, parylene C, or polyimide as the gate dielectric have performance comparable to devices using SiO 2 as the gate dielectric. These results suggest that there is not a strong correlation between pentacene film grain size and field-effect mobility for these devices. Pentacene TFTs using BCB as the gate dielectric had field-effect mobility as high as 0.7 cm 2 /V-s, on/off ratio > 10 7 , subthreshold slope less than 2 V/decade, and negative threshold voltage, making them an attractive candidate for use in organic-based large-area electronic applications on flexible substrates.
International Symposium on Optical Science and Technology | 2001
D. J. Gundlach; Chung-Chen Shelby Kuo; C.D. Sheraw; J.A. Nichols; Thomas N. Jackson
We report on the use of silicon dioxide gate dielectric chemically-modified with vapor-deposited octadecyltrichlorosilane (OTS) monolayers for improved organic thin film transistor (OTFT) performance. To date, silicon dioxide gate dielectric chemically-modified with OTS monolayers deposited from solvent solution have demonstrated the highest reported OTFT performance using the small-molecule organic semiconductor pentacene as the active layer. Vapor treatment is an attractive alternative, especially for polymeric substrates that may be degraded by solvent exposure. Using our OTS vapor treatment we have fabricated photolithographically defined pentacene OTFTs on flexible polymeric substrates with field-effect mobility greater than 1.5 cm2/V-s. We find the performance of pentacene as well as several other small-molecule organic active layer materials can be significantly improved using silicon dioxide gate dielectric chemically-modified with vacuum vapor prime OTS. Pentacene, naphthacene, Cu-phthalocyanine, and alpha-sexithienyl OTFTs fabricated on thermally oxidized silicon substrates with photolithographically defined bottom contacts typically show a factor of 2 to 5 improvement in field-effect mobility and reduced subthreshold slope when using silicon dioxide gate dielectric vacuum vapor treated with OTS compared to OTFTs on untreated gate dielectric.
international electron devices meeting | 1999
D. J. Gundlach; Hagen Klauk; C.D. Sheraw; Chung-Chen Kuo; J.R. Huang; Thomas N. Jackson
We have fabricated photolithographically defined organic thin film transistors (TFTs) on glass or plastic substrates with carrier field-effect mobility larger than 1 cm/sup 2//V-s, using the organic semiconductor pentacene as the active layer. In addition to high carrier mobility, devices on glass substrates have subthreshold slope as low as 0.4V/decade. TFT performance for devices on both substrate types was extracted at low bias (less than -30 V). These results are the best reported to date for organic TFTs on polymeric and glass substrates.
international electron devices meeting | 2000
C.D. Sheraw; J.A. Nichols; D. J. Gundlach; J.R. Huang; Chung-Chen Kuo; Hagen Klauk; Thomas N. Jackson; Michael G. Kane; J. Campi; F.P. Cuomo; B.K. Greening
We have fabricated the fastest organic circuits on flexible substrates yet reported. These circuits use the small-molecule hydrocarbon pentacene as the active semiconductor material and 75 /spl mu/m thick flexible, transparent, colorless, polyethylene naphthalate (PEN) film as the substrate. Transistor arrays, inverters, ring oscillators, and other circuits with good electrical performance, yield, and uniformity were obtained. A field-effect mobility of 1 cm/sup 2// V-s was extracted from OTFT saturation characteristics, and ring oscillators had minimum propagation delay <40 /spl mu/sec per stage and <50 /spl mu/sec per stage at bias levels below 8 V.
SID Symposium Digest of Technical Papers | 2001
Michael G. Kane; Ian G. Hill; J. Campi; M. S. Hammond; B.K. Greening; C.D. Sheraw; J. A. Nichols; D. J. Gundlach; J.R. Huang; C. C. Kuo; L. Jia; Thomas N. Jackson; John L. West; J. Francl
We have fabricated and demonstrated active-matrix liquid-crystal displays using organic thin-film transistors (OTFTs) on polyester substrates. This is the first reported demonstration of an OTFT active-matrix liquid-crystal display, and also the first demonstration of a TFT active-matrix liquid-crystal display of any type fabricated on a polyester substrate.
device research conference | 2000
C.D. Sheraw; J.A. Nichols; D. J. Gundlach; J.R. Huang; Chung-Chen Kuo; Hagen Klauk; Thomas N. Jackson; Michael G. Kane; J. Campi; F.P. Cuomo; B.K. Greening
Organic thin film transistors (OTFTs) have made impressive progress over the past decade, and it appears increasingly likely that OTFTs will find use in a number of low-cost, large-area electronic applications, such as active-matrix displays, smart cards, price and inventory tags, and large-area sensor arrays. OTFTs provide two principal advantages over TFTs based on inorganic semiconductors: they can be fabricated at lower temperature and, potentially, at significantly lower cost. Low processing temperatures allow OTFT device and circuit fabrication on polymeric or other inexpensive substrates, rather than glass. The prospect of a flexible, rugged, lightweight active-matrix display at relatively low cost has spurred a number of manufacturers and government agencies to consider plastic displays for a variety of military, medical, industrial, and consumer applications. We report here on the design and fabrication of a flexible active-matrix OTFT backplane suitable for use in flexible polymer-dispersed liquid crystal displays. 75 /spl mu/m thick flexible polyethylene naphthalate (PEN) film was used as the substrate, and OTFT and pixel arrays with good electrical performance, yield, and uniformity were obtained.