C. Huynh

New Ultra-High-Isolation RF Switch Architecture and Its Use for a 10–38-GHz 0.18-

A new RF switch architecture with ultrahigh isolation and possible gain is proposed, analyzed, and demonstrated using 0.18-μm BiCMOS technology. The new RF switch architecture achieves an ultrahigh isolation through implementation of a new RF leaking cancellation technique in which the RF leaking signal is suppressed by combining with its replica using a balun. Its isolation is substantially higher than that produced by a conventional switch topology. An analysis of the new active balun employed in the proposed RF switch is also conducted, showing its distinguished characteristic of good balance across ultra-wide frequency ranges, making possible not only the achievement of extremely high isolation, but also ultra-wideband isolation for the RF switch. Additionally, the active balun also provides some gain to compensate for the inherent loss of the RF switch. The newly designed 0.18-μm BiCMOS RF switch exhibits an ultra-broadband performance from 10 to 38 GHz with - 2.6-dB loss to 0.4-dB gain, isolation from 40 to about 70 dB, and input return loss from 8 to 20 dB under small-signal conditions. Within 35.5-38.5 GHz, its isolation reaches extremely high values, with the highest isolation around 70 dB at 36 GHz, approaching the measurable limit of the vector network analyzer. Measured insertion loss and isolation under large-signal conditions at 35 GHz show around 1-2 and 51.5 dB, respectively. The RF switch consumes a dc current of only 8 mA from a 1.8-V source. The extremely high isolation achievable by the new RF switch demonstrates the possibility of pushing RF system performance limited by switch isolation to a next level.

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New technique for synthesizing concurrent dual-band impedance-matching filtering networks is presented. The technique enables the design of concurrent dual-band impedance-matching filtering networks that provide not only simultaneous matching of two arbitrary loads to two arbitrary sources at two different frequencies, but also dual-bandpass filtering response capable of suppressing unwanted signals like the harmonics and inter-modulation products in nonlinear circuits, such as power amplifiers (PAs). A new 0.18-μm SiGe BiCMOS concurrent dual-band PA was designed based on the developed dual-band matching filtering technique around 25.5 and 37 GHz, which works in the concurrent dual-band mode (25.5 and 37 GHz), as well as single-band mode (25.5 or 37 GHz). The measured results show that, in the single-band mode, the dual-band PA exhibits gain of 21.4 and 17 dB, maximum output power of 16 and 13 dBm, and maximum power-added efficiency (PAE) of 10.6% and 4.9% at 25.5 and 37 GHz, respectively. In the dual-band mode, the maximum output power is 13 and 9.5 dBm at 25.5 and 37 GHz, respectively, and the total maximum PAE is 7.1%. The designed concurrent dual-band PA has a chip size of 1.3×0.68 mm2 and consumes a dc current of 120 mA from a 3-V supply voltage.

m BiCMOS Ultra-Wideband Switch

A new ultra wideband (UWB) tunable monocycle pulse generator has been developed. The monocycle pulse was generated through differentiation of an UWB Gaussian or rectangular pulse, which was obtained by differentiating a step pulse generated by step-recovery diode. The tunable differentiation of step pulse was obtained based on a tunable delay line structure using electronic controlled switches. The tunable differentiation of Gaussian or rectangular pulse was done using a monocycle pulse shaping circuit with an RC network based on varactor diode. Measurement result shows good-shape monocycle pulse with pulse width of 400–850 ps and low ringing level.

New Technique for Synthesizing Concurrent Dual-Band Impedance-Matching Filtering Networks and

A new type of active baluns consisting of a common emitter (CE) amplifier with degenerative inductor and a common collector (CC) amplifier is proposed, analyzed and demonstrated using a 0.18-μm SiGe BiCMOS process. The parasitic neutralization and compensation techniques are used to keep the balun well balanced at very high frequencies and across an ultra-wide bandwidth. The active balun is particularly not affected by any components connected at its input or output ports, making it very attractive for integrating with other components and for system integration. The designed 0.18-μm SiGe BiCMOS active balun exhibits an amplitude imbalance lower than 1 dB and phase imbalance lower than 100 from dc to 50 GHz, and consumes a low dc power of only 14.4 mW from a dc power supply voltage of 1.8 V.

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A ultra-small distributed low noise amplifier was developed in a standard JAZZ 0.18-μm RF/mixed signal CMOS process. The 3-stage distributed amplifier occupies just 288 x 291 ¿m or 0.08 mm2 of die area, making it the smallest distributed amplifier reported to date. The circuit exhibits a relatively flat gain of 6 dB from 3.1 to 10.6 GHz with less than 0.5 dB ripple, with excellent input and output match of less than -12 dB and -25 dB, respectively. The noise figure is less than 5 dB to 14 GHz, with only 2.7 dB across 8-10 GHz, while the power consumption is about 22 mW.

SiGe BiCMOS 25.5/37-GHz Concurrent Dual-Band Power Amplifier

The design of a fully integrated 0.18-μm SiGe BiCMOS up-conversion mixer in K-band is presented. The mixer consists of a single-ended-to-differential active balun, double-balanced Gilber mixer cell, differential amplifier and band pass filter. The input active balun is used to facilitate on-wafer characterization from a single-ended IF signal. With an LO power of -2 dBm, the mixer exhibits a conversion gain of 25.7 dB, 1-dB input power of -23 dBm, 1-dB output power of 1.36 dBm, and maximum output power of 2.7 dBm at 24.5 GHz, while consuming a DC current of 40 mA from a supply voltage of 1.8V. Design procedure, parameter trade-off, simulation, and layout issues of the mixer are discussed.

Tunable monocycle pulse generator using switch controlled delay line and tunable RC network for UWB systems

New fully integrated single-chip impulse ultra-wideband (UWB) transmitter front-ends, integrating tunable impulse or monocycle-pulse generator with bi-phase shift-keying (BPSK) modulator, have been developed using a standard low-cost 0.18-µm CMOS process. The monocycle pulse generator component produces 0.7 – 0.75 V peak-to-peak monocycle pulse with 140 – 350 ps tunable pulse duration. The impulse generator generates 0.95 – 1.05 V peak-to-peak Gaussian-type impulse signal with 100 – 300 ps tunable pulse duration. The BPSK modulator controls the pulse generator to generate positive or negative pulse signal depending on the “1” or “0” digital data information. The pulse signals produced by the developed transmitters are useful for various UWB applications, especially those requiring the capability of changing ranges and resolutions using only a single system.

Ultra-Wideband Active Balun Topology and Its Implementation on SiGe BiCMOS Across DC-50 GHz

A new RF active balun is proposed, analyzed and designed using a 0.18-µm BiCMOS technology, showing its distinguished characteristic of good balance across ultra-wide frequency ranges. The active balun provides a high differential-mode gain and extremely low common-mode gain; hence, ultra-high common-mode signal suppression. The designed 0.18-µm BiCMOS active balun exhibits an ultra-broadband performance from 2 to 40 GHz differential-mode gain from 1 to 5.2 dB and common-mode signal suppression from 25 to 71 dB. Good matching at its input and output are obtained at the 35-GHz design frequency. The RF active balun consumes a dc current of 8.2 mA from a 1.8 V source.

Design of an ultra-small distributed low-noise-amplifier for ultra-wideband applications

A new ultra-wideband 0.18-μm CMOS sampling receiver frontend was developed. It includes a low-noise amplifier (LNA) and a sampler and achieves high gain, fast sampling, low noise figure, low power consumption, and enhanced RF-power efficiency. The LNA and sample-and-hold capacitor are switched using two synchronized strobes generated on-chip. Measured results show performance of 9 to 12 dB voltage conversion gain, 16 to 25 dB noise figure, and power consumption of only 21.6 mW (with buffer) and 11.7 mW (without buffer) across DC to 3.5 GHz with 100-MHz sampling frequency.

A K-band SiGe BiCMOS fully integrated up-conversion mixer

A distributed low-noise amplifier (LNA) employing novel transmission lines and inductors was designed in a standard 0.18-μm CMOS process. The new LNA provides significant improvement in performance and size with less than 13 dB return loss from DC to 17 GHz, average gain of 8 ± 0.2 dB from DC to 20 GHz, noise figure of 3.4–5 dB from 0.5–19 GHz, power consumption of 34.2 mW, and 1.05 × 0.37 mm2 chip size including RF pads.