Juseok Bae

A 10–67-GHz CMOS Dual-Function Switching Attenuator With Improved Flatness and Large Attenuation Range

A 4-bit CMOS dual-function switching attenuator is designed using new architecture and method to obtain not only fine attenuation flatness and large attenuation range over an extremely wide frequency range, but also switching ability. Specifically, the inherent frequency responses of conventional Pi-, T- and distributed attenuators are utilized along with the transistors body-floating technique to improve the attenuation flatness and range, as well as lower the insertion loss. The switch constituent of the attenuator is also designed to contribute to extra isolation at low frequencies as well as to produce reflective switching. Analysis for the new attenuator is derived and its performance is verified through simulations and measurements. Over 10-67 GHz, the measured results show the attenuation flatness of 2.4-6.8 dB, attenuation range of 32-42 dB, and isolation of 42-67 dB. The same attenuator could achieve 2- and 3-dB attenuation flatness if the operation frequency is limited to 12.5-37 GHz and 10-43 GHz, respectively. The minimum attenuation is 8.4-15.2 dB across 10-67 GHz. The 1-dB compression power is more than 14 dBm. The attenuator is fabricated using 0.18-μm BiCMOS technology and its size is 1450 μm ×530 μm.

A Novel Concurrent 22–29/57–64-GHz Dual-Band CMOS Step Attenuator With Low Phase Variations

A novel 22-29/57-64-GHz concurrent dual-band CMOS 4-bit step attenuator with small phase variations is presented. A new integrated diplexer-attenuator possessing both attenuation and diplexer filtering functions is used to achieve the concurrent dual-band response for the 22-29/57-64-GHz concurrent dual-band attenuator, which leads to small size and low insertion loss. The 22-29/57-64-GHz concurrent dual-band attenuator also includes a new distributed attenuator configured to result in small phase variation. The 22-29/57-64-GHz concurrent dual-band attenuator is fabricated using a 0.18-μm BiCMOS technology. The measured insertion loss, root-meansquare (rms) amplitude error, and rms phase error are less than 7.9 dB, 0.55 dB, and 4.7° in the first passband of 22-29 GHz, respectively. In the second passband, 57-64 GHz, the measured insertion loss, rms amplitude error, and rms phase error are less than 11 dB, 1.5 dB, and 4.1°, respectively. The measured stopband rejections over the 16 states are greater than 28 and 31 dB at 12 and 36 GHz, respectively. The core chip size is 1.8 × 0.52 mm2.

A 44 GHz CMOS RFIC Dual-Function Attenuator with Band-Pass-Filter Response

A dual-function attenuator possessing both attenuation and band-pass filtering functions is proposed. The new dual-function band-pass attenuator architecture is derived by replacing the quarter-wavelength transmission line of a conventional attenuator with a 2nd-order admittance-inverter band-pass filter. Design formulas for the dual-function band-pass attenuator are derived. A 3-b CMOS dual-function band-pass step attenuator designed using a 0.18 μm BiCMOS technology shows measured insertion loss of 4.4-5.9 dB, RMS amplitude error of 0.8-1.4 dB, RMS phase error of 1.9-6.7 ° over 36-52 GHz, input P1dB higher than 20 dBm at 44 GHz, and band-pass-filtering response with stop-band rejections greater than 18 dB at 24 and 64 GHz.

Dual-band filter design with new frequency-transformation method having both band-pass and high-pass responses

A new frequency-transformation concept is proposed to design a dual-band filter having both band-pass and high-pass responses. The new frequency-transformation incorporates an extra frequency parameter to achieve the additional high-pass response. To realize the concept, the conventional band-pass filters resonators are modified based on their frequency responses and formulae for the new resonators are derived. A new dual-band filter is also designed with the modified resonators and design equations, fabricated and measured, demonstrating the desired dual-band band-pass and high-pass characteristics.

A 0.18-μm BiCMOS wide locking-range divide-by-2 injection-locked frequency divider with dual-injection

A new divide-by-2 injection locked frequency divider (ILFD) with dual-injection technique is proposed. The proposed ILFD is developed with divide-by-2 current mode logic (CML) divider, which is connected at the output of the ILFD to achieve constant output amplitude. Fabricated in 0.18-μm BiCMOS process, the proposed divide-by-2 ILFD with dual-injection improves the locking range through simultaneous optimization of loaded quality factor (QL) and oscillation current amplitude (iosc) while consuming low power. The measured locking range of the proposed ILFD with dual-injection is 692 MHz between 7.512 GHz and 8.204 GHz, which is almost 10 times wider than that of a single-injection counterpart. The core of the ILFD with dual-injection only consumes 2.9 mA with 1.5-V supply.

Application and implementation of computational electromagnetics in radio-frequency integrated-circuit design

Use of computational electromagnetics (EM) in the design of radio-frequency integrated-circuit (RFIC) is presented. Computational EM is not only essential, but also inevitable, for RFIC design without it, it is simply not possible to accurately design (or even design) RFICs effectively and timely. Several examples including RFIC band-pass filter and power amplifier designed based on computational EM are presented to demonstrate the application and essence of computational EM, showing that computational EM successfully predicts the performance close to the measured results. The results of EM simulations on RFICs matching well with those measured are valuable for the research and development of theoretical computational EM methods as applications are one of the main drives of the development.

Investigation of an advanced concurrent 44/60-GHz dual-band phased array for communications and sensing

A millimeter-wave 16-element 44/60-GHz concurrent dual-band phased-array front end capable of two-dimensional scanning with orthogonal polarizations for wireless communications and sensing has been investigated. Simulated results of the phased array front end show its concurrent performance at 44 and 60 GHz. In the receive (RX) mode, it has noise figure of 7.3/7.1 and 7.4/7.2 dB at the radiating elements and total array gain of 9.9/14.1 and 7.8/11.7 dB for the horizontal (H)/vertical (V) polarization at 44 and 60 GHz, respectively. In the Transmit (TX) mode at 44 and 60 GHz, it achieves a radiated power of 14.7 and 13.8 dBm at each antenna element and total gain of 21.4 and 10.4 dB for H- or V-polarization, respectively. The phased array also achieves ultra-high isolations of 75/73 dB and 120/118 dB at 44/60 GHz from TX to RX for H- and V-polarization, respectively.

Some recent developments of millimeter-wave RFIC attenuators

Recent developments of millimeter-wave CMOS radio frequency integrated circuit (RFIC) attenuators possessing switching and band-pass filtering functions are presented. The attenuators are developed using 0.18-µm SiGe BiCMOS technology. The CMOS dual-function attenuator capable of switching is designed for 4-bit operations and 10–67-GHz bandwidth, which achieves measured attenuation flatness of 2.4– 6.8 dB, attenuation range of 32–42 dB, and isolation of 42–67 dB. The minimum attenuation is 8.4–15.2 dB across 10–67 GHz. The 1-dB compression power is greater than 14 dBm at 40 GHz. The CMOS dual-function attenuator with band-pass filtering response is designed for 3-bit operations and 44-GHz center frequency, which has measured insertion loss of 4.4–5.9 dB, RMS amplitude error of 0.8–1.4 dB, RMS phase error of 1.9–6.7° over 36–52 GHz, input P1dB higher than 20 dBm at 44 GHz, and band-pass-filtering response with stop-band rejections greater than 18 dB at 24 and 64 GHz.

A 4.6–5.9 GHz fully integrated 0.25-µm CMOS complementary LC VCO with buffer

A new fully integrated 0.25-μm CMOS complementary LC VCO with buffer with low phase noise, wide tuning range, and high frequency of merit is reported. The developed VCO achieves a 25% tuning range across 4.6-5.9 GHz, phase noise of -117 dBc/Hz at 1-MHz offset, and frequency of merit of 183.7. The integrated VCO has a die size of 320μm×300μm.

Investigation of an advanced millimeter-wave 94-GHz phased array for communications and sensing

A new 94-GHz 4×4 phased array frontend capable of two-dimensional scanning with orthogonal polarizations for wireless communications and sensing has been investigated. The proposed phased array frontend resolves the RF signal leakage and isolation dilemma encountered in typical systems employing a single antenna for both transmission and reception, effectively maximizing the systems dynamic range and linearity operation as well as minimizing the noise figure. Simulations at 94 GHz show high performance for the phased array frontend. In the receive (RX) mode, it has noise figure of 8.5/8.4dB at the radiating element, RMS phase error of 2.38/2.36° and gain error of 1.22/1.27dB, and total array gain of 17/22.3dB for H/V polarization, respectively, and ultra-high isolations from TX-Antenna (−200/−190dB), TX-RX (−106/−180dB) and V-H antenna ports (66/69dB). In the Transmit (TX) mode at 94 GHz, it achieves a radiated power of 7.8 dBm at the element antenna and RMS gain and phase errors of 1.28 dB and 2.19° at 94 GHz, respectively.