C. Kaufmann

TiN diffusion barriers for copper metalization

Summary form only given. The requirements of future integrated circuits will result in shrinking dimensions and consequently new materials like copper or low k materials. TiN films are an interesting candidate as diffusion barriers because of their well known compatibility to semiconductor technology. Moreover TiN films were already shown to be stable barriers against copper diffusion. Based on a series of tests including the stochiometry variation of films deposited by reactive magnetron sputtering on Si and SiO/sub 2/ and annealing in different atmospheres the interaction between film properties and barrier stability is studied. The applicability of optical, mechanical and analytical thickness measurement methods for thin TiN films is investigated. Advantages and drawbacks of the used measurement techniques given by method related boundary conditions are discussed.

Investigation of copper metallization induced failure of diode structures with and without a barrier layer

Different metallization systems Cu/Si, Cu/Ti/Si, Cu/W/Si and Cu/TiN (N/Ti ratio < and 1 )/Si were prepared on n + p-diodes. After sequential annealing in H 2 -atmosphere these structures were investigated by electrical and analytical methods. For a metallization without barrier layer the electrical breakdown is caused by the formation of Cu 3 Si. Randomly distributed reaction spots are visible on the silicon surface. For Ti and W the electrical failure occurs after annealing at 450°C in H 2 -atmosphere. The breakdown of diodes with TiN is first found for barrier layers with a N/Ti-ratio < 1 after annealing at 650°C. Stoichiometric TiN-barriers are stable after annealing at 650°C. The electrical breakdown can be assigned to failure mechanisms determined by the barrier film properties.

Structure and electrical properties of thin copper films deposited by MOCVD

Abstract A low temperature CVD process for the blanket deposition of copper films using the metalorganic precursor Hexafluoroacetylacetonato Copper(I) Vinyltrimethylsilane (Cu(hfac)TMVS, CupraSelect™) was developed and tested on different substrate materials. A liquid delivery system was applied for the dosage of the precursor. Film properties were determined by four-point probe, surface profilometer and scanning electron microscope (SEM). Deposition rates on the scale of 50 nm/min and film resistivities down to 2 μΩ · cm were obtained depending on the process conditions and the substrate.

W/TiN double layers as barrier system for use in Cu metallization

Abstract The properties of Cu/W/TiN film stacks were studied. Adding at thin W layer to a known stable TiN diffusion barrier significantly affects the whole metallization system. The introduction of a thin W interlayer causes a significant change of the Cu texture, while the film stress remains stable. The adhesion of Cu on W is excellent, if deposited without vacuum break. The poor adhesion of Cu on air exposed W/TiN is improved by a subsequent annealing step in H2. The performed analytical and electrical barrier tests demonstrate the tandem barrier to be stable up to 650°C.

Electrical characterization of reactively sputtered TiN diffusion barrier layers for copper metallization

Abstract TiN films were characterized by sheet resistance measurements, Auger electron spectroscopy and cross-sectional transmission electron microscopy. The properties as diffusion barrier between copper and silicon were investigated by diode leakage current measurements on n + p diodes after annealing at 350°C for 30 min and at 450, 500 and 550°C for 60 min. Both Ti-rich and N-rich TiN films were deposited at a DC magnetron power of 8 kW. Furthermore, additional N-rich films were deposited at a DC magnetron power of 2 kW. The copper was then deposited by metalorganic low pressure chemical vapour deposition and by sputtering. Samples with and without a diffusion barrier were prepared. N-rich films deposited at DC magnetron powers of 2 and 8 kW are found to be an effective barrier up to an annealing at 500°C for 60 min in case of metallization with sputtered copper. On the other hand the Ti-rich barriers still fail after annealing at 450°C for 60 min. The barrier structures metallized with copper deposited by metalorganic low pressure chemical vapour deposition are almost broken even at lower temperatures.

Determination of ohmic contacts to n-type 6H- and polycrystalline 3C-SiC using circular transmission line structures

Abstract Ohmic contacts to n-type 3C- and 6H-SiC were investigated using the circular transmission line method (CTLM). For the contact metallization titanium-tungsten, tungsten and tungsten disilicide were used. The determination of the specific contact resistance using two different test structures of CTLMs was tried, but it was shown that the end contact measurements as they were proposed in the more sophisticated model by Reeves were too high and the equations were not solvable within the conditions of the present study. The specific contact resistance was calculated by the method of Marlow and Das. Annealing the contacts resulted for TiW contacts in a ϱc=3.7 × 10−4 ω cm−2 to 6H-SiC (7.1 × 10−5 ω cm−2 to 3C-SiC) and for WSi2 contacts in a ϱc=2.1 × 10−5 ω cm−2 to 6H-SiC (2.20 × 10−5 ω cm−2 to 3C-SiC).

Film stress measurements for high temperature micromechanical and microelectronical applications based on SiC

Abstract Film stress measurements of SiC-layers for high temperature applications were performed using the bending plate method and micro-Raman spectroscopy in the conventional plane-view and in the cross-sectional geometry. Both methods which independently measure the stress are found to yield consistent results. The stress for a nominal 1.9 μm thick SiC-layer is evaluated to be about 130–150 MPa with a concave curvature at room temperature. With respect to micromechanical and microelectronical applications the influence of an additional TiW metallization is also considered. In this case the maximum stress depends on the highest temperature applied to the system before.

Comparative study of Cu and CuAl 0.3 wt.% films

Abstract Cu and CuAl 0.3 wt.% films were deposited by DC magnetron sputtering on SiO 2 or a Ta interlayer. They are characterized with respect to resistivity, stress, adhesion, roughness and microstructure. The Al concentration is homogeneous within the CuAl 0.3 wt.% films and equals the target composition. Al is enriched at the surface after annealing. No Al precipitation or formation of intermetallic phases is observed. The addition of Al results in a decreased roughness, which is caused by significantly smaller grains of nearly constant size. Adhesion on SiO 2 (after annealing) and oxidation resistance are improved due to the addition of Al. The modified properties of the alloy are balanced with an increase in resistivity of 3.3 μΩ cm after deposition, which decreases to the bulk value of 2.6 μΩ cm after annealing. Process parameters and target erosion profile are equal to pure Cu targets.

Thermal stability of CoSi2 layers implemented in a silicon-on-insulator substrate

A silicon-on-metal-on-insulator substrate, consisting of a top Si layer, a buried CoSi2 layer and a buried SiO2 layer on a Si (1 0 0) substrate was formed using Co silicidation, wafer bonding and wafer splitting. It is shown that the buried silicide layers in this structure exhibit a much higher thermal stability than surface layers. Resistivity measurements and cross-sectional transmission electron microscopy investigations revealed that buried CoSi2 layers withstand furnace anneals at 1000 °C up to 2 h, while surface CoSi2 layers started to degrade after 10 min anneals at 1000 °C. The proposed substrate is most useful for BiCMOS applications.

High temperature stable metallization schemes for SiC-technology operating in air

Complete metallization schemes for SiC based high temperature applications were investigated with regard to their physical and chemical stability, and their electrical behaviour under the influence of a high temperature air ambient. Two metal silicides, MoSi/sub 2/ and WSi/sub 2/, were used as contacts to the 6H-SiC substrate. MoSi/sub 2/ and WSi/sub 2/ show ohmic behaviour after thermal contact formation. The specific contact resistances obtained are in the range from 10/sup -4/ to 10/sup -5/ /spl Omega/ cm/sup 2/. To keep the system design simple for these investigations, both silicides were used for on-chip interconnects. The connection to the next wiring level was realized by an 3 /spl mu/m Al cover layer and Al thick wire bonding. All systems show electrically stable behaviour during thermal storage at 400/spl deg/C for more than 1000 hours. No intermixing or degradation within the systems was found by Auger electron spectroscopy depth profile analysis and electrical measurements.