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Dive into the research topics where C. Mark Johnson is active.

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Featured researches published by C. Mark Johnson.


IEEE Transactions on Power Electronics | 2010

Real-Time Compact Thermal Models for Health Management of Power Electronics

Mahera Musallam; C. Mark Johnson

Implementation of real-time health assessment and thermal management of power electronic devices require real-time electrothermal models that can be used to predict the temperatures of device junctions, interfaces, etc., which cannot ordinarily be measured during service. This paper presents a real-time reduced-order compact thermal model, which is incorporated in a pulsewidth modulation and current controlled full bridge. An accurate representation of the dynamic thermal behavior was obtained experimentally and converted into a simplified multiexponential form then combined with lookup tables that provide estimates of the device losses based on measured values of the phase current. For interfaces away from the surface, such as solder layers, a validated Flotherm model is used to predict the temperatures of the hidden layers. Comparison of the real-time temperature estimates with IR measured values obtained from a high-speed IR camera showed that the reduced-order model was capable in estimating the modules temperatures over a range of modulation conditions. This real-time model is well-suited to the continuous monitoring of the internal behavior of the electrothermal effects within power electronic modules and can thus be used as part of a prognostic tool to provide knowledge through thermal cycling by combining with thermomechanical wear out models for health management of power electronics.


IEEE Transactions on Power Electronics | 2016

Application of Kalman Filter to Estimate Junction Temperature in IGBT Power Modules

Mohd. Amir Eleffendi; C. Mark Johnson

Knowledge of instantaneous junction temperature is essential for effective health management of power converters, enabling safe operation of the power semiconductors under all operating conditions. Methods based on fixed thermal models are typically unable to compensate for degradation of the thermal path resulting from aging and the effect of variable cooling conditions. Thermosensitive electrical parameters (TSEPs), on the other hand, can give an estimate of junction temperature TJ, but measurement inaccuracies and the masking effect of varying operating conditions can corrupt the estimate. This paper presents a robust and noninvasive real-time estimate of junction temperature that can provide enhanced accuracy under all operating and cooling conditions when compared to model-based or TSEP-based methods alone. The proposed method uses a Kalman filter to fuse the advantages of model-based estimates and an online measurement of TSEPs. Junction temperature measurements are obtained from an online measurement of the on-state voltage, VCE (ON), at high current and processed by a Kalman filter, which implements a predict-correct mechanism to generate an adaptive estimate of TJ. It is shown that the residual signal from the Kalman filter may be used to detect changes in thermal model parameters, thus allowing the assessment of thermal path degradation. The algorithm is implemented on a full-bridge inverter and the results verified with an IR camera.


energy conversion congress and exposition | 2010

Real-time life consumption power modules prognosis using on-line rainflow algorithm in metro applications

Mahera Musallam; C. Mark Johnson; Chunyan Yin; C. Bailey; Michel Mermet-Guyennet

A real-time prognostic tool to predict life-time of IGBT power modules in a metro application is presented. Applying conventional life models (e.g. Coffin-Manson) for real applications is infeasible because these models are only applicable to cyclic data. Use of off-line rainflow algorithm is common solution but cannot be applied in real-time in its original form. This paper presents on-line life-estimation of the power modules using real-time rainflow coding algorithm. This technique is applied to an example metro application that requires use of cycle counting for an arbitrary load profile. The proposed method uses a stack-based implementation which employs a recursive algorithm to identify full and half cycles of the temperatures obtained as outputs from real-time compact thermal models. This then allows life-time models to be used to provide life consumption estimates. This method provides less complexity and more accurate on-line prediction for the studied modules failure mechanisms.


european conference on power electronics and applications | 2007

High performance cooling system for automotive inverters

Cyril Buttay; Jeremy Rashid; C. Mark Johnson; Peter T. Ireland; Florin Udrea; G.A.J. Amaratunga; Rajesh Kumar Malhan

A novel double-side cooled power module is presented which delivers superior cooling performance with the potential for improved robustness to thermal cycling. The semiconductor dies are sandwiched between conventional DBC substrates, the substrates being directly cooled rather than through a conventional heat spreader heat sink assembly. A theoretical analysis is presented illustrating that direct cooling can offer a lower total thermal resistance provided the heat transfer coefficient at the cooled surface is sufficiently high. Experimental results demonstrate the effectiveness of the selected impingement cooling technique when applied in both single- and double-side cooled formats. Measurements on the double-side cooled structure show a total thermal resistance (junction to ambient) that is less than 40% of the junction to case resistance of a conventional module. Similar improvements are observed in the transient thermal impedance (step response) curve indicating that thermal cycling ranges will be reduced under all operational conditions.


Materials Science Forum | 2007

High Voltage Silicon Carbide Schottky Diodes with Single Zone Junction Termination Extension

Konstantin Vassilevski; Irina P. Nikitina; Alton B. Horsfall; Nicolas G. Wright; Anthony O'Neill; Keith P. Hilton; A.G. Munday; A.J. Hydes; M.J. Uren; C. Mark Johnson

High voltage 4H-SiC Schottky diodes with single-zone junction termination extension (JTE) have been fabricated and characterised. Commercial 4H-SiC epitaxial wafers with 10, 20 and 45 +m thick n layers (with donor concentrations of 3×1015, 8×1014 and 8×1014 cm-3, respectively) were used. Boron implants annealed under argon flow at 1500°C for 30 minutes, without any additional protection of the SiC surface, were used to form JTE’s. After annealing, the total charge in the JTE was tuned by reactive ion etching. Diodes with molybdenum Schottky contacts exhibited maximum reverse voltages of 1.45, 3.3 and 6.7 kV, representing more than 80% of the ideal avalanche breakdown voltages and corresponding to a maximum parallel-plane electric field of 1.8 MV/cm. Diodes with a contact size of 1×1 mm were formed on 10 +m thick layers (production grade) using the same device processing. Characterisation of the diodes across a quarter of a 2-inch wafer gave an average value of 1.21 eV for barrier heights and 1.18 for ideality factors. The diodes exhibited blocking voltages (defined as the maximum voltage at which reverse current does not exceed 0.1 mA) higher than 1 kV with a yield of 21 %.


Microelectronics Reliability | 2014

Application of coupled electro-thermal and physics-of-failure-based analysis to the design of accelerated life tests for power modules

Mahera Musallam; Chunyan Yin; C. Bailey; C. Mark Johnson

In the reliability theme a central activity is to investigate, characterize and understand the contributory wear-out and overstress mechanisms to meet through-life reliability targets. For power modules, it is critical to understand the response of typical wear-out mechanisms, for example wire-bond lifting and solder degradation, to in-service environmental and load-induced thermal cycling. This paper presents the use of a reduced-order thermal model coupled with physics-of-failure-based life models to quantify the wear-out rates and life consumption for the dominant failure mechanisms under prospective in-service and qualification test conditions. When applied in the design of accelerated life and qualification tests it can be used to design tests that separate the failure mechanisms (e.g. wire-bond and substrate-solder) and provide predictions of conditions that yield a minimum elapsed test time. The combined approach provides a useful tool for reliability assessment and estimation of remaining useful life which can be used at the design stage or in-service. An example case study shows that it is possible to determine the actual power cycling frequency for which failure occurs in the shortest elapsed time. The results demonstrate that bond-wire degradation is the dominant failure mechanism for all power cycling conditions whereas substrate-solder failure dominates for externally applied (ambient or passive) thermal cycling.


IEEE Transactions on Power Electronics | 2014

Design Optimization of Quasi-Active Gate Control for Series-Connected Power Devices

Nithiphat Teerakawanich; C. Mark Johnson

This paper presents a new gate drive circuit for driving a series string of insulated-gate bipolar transistors (IGBTs). The proposed quasi-active gate control (QAGC) circuit is simple to implement as it consists of only a few passive components in addition to a standard gate driver. No separate isolation power supply is required for the upper devices in the stack. The proposed QAGC circuit provides an effective way to drive the power devices and control static and dynamic voltage sharing to the devices at the same time. The theoretical switching operation and the oscillation stability analysis allow criteria for component selection to be established. Limitations of the QAGC circuit are also identified. The modification of the circuit to support more power devices in the series stack is discussed with the aid of the simulation results. The switching operation of the circuit is validated from the experimental results using two IGBTs connected in series. The circuit shows an excellent switching operation with well-controlled dynamic and static voltage sharing and comparable gate voltage between the coupled devices.


Materials Science Forum | 2006

High Temperature Operation of Silicon Carbide Schottky Diodes with Recoverable Avalanche Breakdown

Konstantin Vassilevski; Irina P. Nikitina; Praneet Bhatnagar; Alton B. Horsfall; Nicolas G. Wright; Anthony O'Neill; M.J. Uren; Keith P. Hilton; A.G. Munday; A.J. Hydes; C. Mark Johnson

4H-SiC diodes with nickel silicide (Ni2Si) and molybdenum (Mo) Schottky contacts have been fabricated and characterised at temperature up to 400°C. Room temperature boron implantation has been used to form a single zone junction termination extension. Both Ni2Si and Mo diodes revealed unchanging ideality factors and barrier heights (1.45 and 1.3 eV, respectively) at temperatures up to 400°C. Soft recoverable breakdowns were observed both in Ni2Si and Mo Schottky diodes at voltages above 1450 V and 3400 V depending on the epitaxial structure used. These values are about 76% and 94% of the ideal avalanche breakdown voltages. The Ni2Si diodes revealed positive temperature coefficients of breakdown voltage at temperature up to 240°C.


Materials Science Forum | 2004

Low Voltage Silicon Carbide Zener Diode

Konstantin Vassilevski; Konstantinos Zekentes; Alton B. Horsfall; C. Mark Johnson; Nicolas G. Wright

4H-SiC p + -n + Zener diodes with a breakdown at voltage of 22 V have been fabricated and characterized in continuous and pulsed mode of operation at ambient temperatures of up to 200°C. The diodes were capable of operating at dc current densities up to 8 kA/cm and pulsed current densities up to 100 kA/cm 2 . They exhibited a value of isothermal dynamic impedance of less than 2.5 Ω at 200°C, a zero bias capacitance of 28 pF and mixed avalanche-tunnel breakdown with a positive temperature coefficient of breakdown voltage of about (8-10)⋅10K.


Materials Science Forum | 2010

Growth of Few Layers Graphene on Silicon Carbide from Nickel Silicide Supersaturated with Carbon

Konstantin Vassilevski; Irina P. Nikitina; Alton B. Horsfall; Nicolas G. Wright; C. Mark Johnson

Few Layers Graphene (FLG) films were grown on the carbon-terminated surface of 4H-SiC from nickel silicide supersaturated with carbon. The process was realised by annealing of thin Ni films deposited on silicon carbide followed by wet processing to remove the nickel silicide. To identify and characterize the fabricated FLG films, micro-Raman scattering spectroscopy, AFM and optical microscopy have been used. The films grown on samples with initially deposited nickel thinner than 20 nm show clear graphene footprints in micro-Raman scattering spectra, namely a single component, Lorentzian shape 2D band with FWHM remarkably lower than that of the 2D peak of graphite.

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Jianfeng Li

University of Nottingham

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Pearl Agyakwa

University of Nottingham

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C. Bailey

University of Greenwich

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Paul Evans

University of Nottingham

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