C. Rush

Results of radiation test of the cathode front-end board for CMS endcap muon chambers

Abstract After a brief overview of the CMS EMU electronics system, results on radiation induced single event effects, total ionization dose and displacement effects will be reported. These results are obtained by irradiating the components on electronics boards with 63 MeV protons and 1 MeV neutrons. During the proton irradiation, the electronics board was fully under power, all components on the board were active and the data were read out in the same way as designed for CMS. No deterioration of analog performance for each of the three CMOS ASICs on the tested board was observed, up to a dose of 10 krad . Each of the tested FPGAs survived beyond the dose of 30 krad . No single event latch-up was detected for the CMOS ASICs up to a proton fluence of 2×10 12 cm −2 . Single Event Upsets (SEU) in FPGAs were detected and their cross-sections measured. SEU mitigation with triple module redundancy and voting was implemented and tested.

Design, performance and status of the CLEO III silicon detector

Abstract The CLEO III silicon detector is part of a general upgrade of the CLEO detector to allow for operation at a luminosity of 2×10 33 cm −2 s −1 , which will be provided by the Cornell Electron–Positron Storage Ring (CESR) beginning in 1999. The silicon detector is a four-layer barrel design covering radii from 2.5 to 10.2 cm with 93% solid angle coverage. The silicon sensors are DC-coupled and double-sided with double-metal readout on the p-side. The n-type strips measure φ , with 50 μ m pitch while the p-type strips measure z , the coordinate along the beam axis, with 100 μ m pitch. The readout electronics are mounted on BeO hybrids attached to the conical support structure and connected to the silicon sensors via a thin kapton flex cable. The electronics consist of an R / C chip with bias resistors and decoupling capacitors, a low-noise preamp/shaper chip and a digitizer/sparsifier chip. Readout is done using VME-based sequencer boards. Production of all detector components is nearing completion and installation of the detector will take place in early 1999.

THE CLEO III SILICON TRACKER

Abstract The Cornell Electron Storage Ring is being upgraded to B-factory luminosities. The CLEO detector is also being upgraded with a new charged particle tracking system and with the addition of a ring imaging Cerenkov particle identification system. A major part of the tracking system upgrade is the construction of a new four-layer double-sided silicon tracker with 93% solid angle coverage and new readout electronics. The status of the silicon tracker including production tests and the expected performance of the final system are discussed.

Design and initial performance of the CLEO III silicon tracker

Abstract CLEO III is the new experimental phase of the CLEO experiment at the CESR accelerator. Both the accelerator and the detector have recently been upgraded. A new charged particle tracking system with the addition of a ring imaging Cherenkov particle identification system has been installed. A major part of the tracking system upgrade was the construction of a new four-layer double-sided silicon tracker with 93% solid angle coverage and new readout electronics. The CLEO III upgrade was completed in February 2000 with the installation of the silicon detector. CLEO III has finished the commissioning phase and is now taking data. The design of the detector and first performance results are presented here.

Low noise electronics for the CLEO III silicon detector

Abstract We report here the status of the CLEO III silicon vertex detector electronics. The CLEO III silicon detector is a 4-layer barrel-style device which spans 93% of the solid angle observing the interaction region. All layers will be constructed with double-sided silicon. The innermost layer must be able to handle large singles rates associated with a detector situated near the interaction region. In order to cover the required solid angle, the outermost layer is 55 cm long and presents a large capacitive load to the front-end electronics. The electronics chain chosen to meet this challenge consists of a low noise cascode preamplifier followed by an ADC on each channel. The system issues will be described herein together with the chosen solutions, noise performance of each subsystem prototype, and expected results of the full system.

Tests of Cathode Strip Chamber Prototypes

Abstract We report on the results of testing two six-layer 0.6 × 0.6 m 2 cathode strip chamber (CSC) prototypes in a muon beam at CERN. The prototypes were designed to simulate sections of the end-cap muon system of the Compact Muon Solenoid (CMS) detector which will be installed at the Large Hadron Collider (LHC). We measured the spatial and time resolutions of each chamber for different gains, different orientations with respect to the beam direction and different strength magnetic fields. The single-layer spatial resolution of a prototype with a strip pitch of 15.88 mm ranged from 78 to 468 μm, depending on whether the particle passed between two cathode strips or through the center of a strip; its six-layer resolution was found to be 44 μm. The single-layer spatial resolution of a prototype with a strip pitch of 6.35 mm ranged from 54 to 66 μm; its six-layer resolution was found to be 23 μm. The efficiency for collecting an anode wire signal from one of six layers within a 20 ns time window appropriate for the LHC was found to be greater than 95% in normal running conditions.

A resonance measuring wire tension monitor for high-energy physics

The design, construction, and operation of a wire tension monitor is presented. The technique used is unique in that the electric force is used to excite the wire into harmonic resonance. The amplitude of the wire is in turn monitored using the variation of the oscillating wires capacitance measured by a resonance circuit. Finally, the resonance is found electronically using phase lock loop techniques. Wire tension is measured to an accuracy of 0.3% with this device. >

The power supply system of the CLEO III silicon detector

Abstract The CLEO III detector has recently commenced data taking at the Cornell Electron Storage Ring (CESR). One important component of this detector is a four layer double-sided silicon tracker with 93% solid angle coverage. This detector ranges in size and number of readout channels between the LEP and LHC silicon detectors. In order to reach the detector performance goals of signal-to-noise ratios greater than 15 : 1 low noise front-end electronics together with highly regulated low noise power supplies were used. In this paper, we describe the low-noise power supply system and associated monitoring and safety features used by the CLEO III silicon tracker.

A fast cluster finding processor for the ZEUS calorimeter

Abstract The design, construction and operation of a fast cluster finding processor for the ZEUS calorimeter is described.

Radiation-Hard Optical Hybrid Board for the ATLAS Pixel Detector

We have designed a hybrid board for optical data transmission in the ATLAS pixel detector. This opto-board features two kinds of ASICs, VDC and DORIC. The former drives a Vertical Cavity Surface Emitting Laser (VCSEL) for data transmission from the pixel detector and the latter recovers Bi-Phase Mark (BPM) encoded command signals received optically by a PIN diode. The opto-board is fabricated with a beryllium-oxide (BeO) substrate for heat management. We present the status of opto-board production and performance.