C Voz

Optoelectronic properties of CuPc thin films deposited at different substrate temperatures

Structural and optical characterization of copper phthalocyanine thin film thermally deposited at different substrate temperatures was the aim of this work. The morphology of the films shows strong dependence on temperature, as can be observed by atomic force microscopy and x-ray diffraction spectroscopy, specifically in the grain size and features of the grains. The increase in the crystal phase with substrate temperature is shown by x-ray diffractometry. Optical absorption coefficient measured by photothermal deflection spectroscopy and optical transmittance reveal a weak dependence on the substrate temperature. Besides, the electro-optical response measured by the external quantum efficiency of Schottky ITO/CuPc/Al diodes shows an optimized response for samples deposited at a substrate temperature of 60 °C, in correspondence to the I–V diode characteristics.

Stability of hydrogenated nanocrystalline silicon thin-film transistors

Abstract Hydrogenated nanocrystalline silicon thin-films were obtained by catalytic chemical vapour deposition at low substrate temperatures (150°C) and high deposition rates (10 A/s). These films, with crystalline fractions over 90%, were incorporated as the active layers of bottom-gate thin-film transistors. The initial field-effect mobilities of these devices were over 0.5 cm2/V s and the threshold voltages lower than 4 V. In this work, we report on the enhanced stability of these devices under prolonged times of gate bias stress compared to amorphous silicon thin-film transistors. Hence, they are promising candidates to be considered in the future for applications such as flat-panel displays.

Optimisation of doped microcrystalline silicon films deposited at very low temperatures by hot-wire CVD

Abstract In this paper we present new results on doped μc-Si:H thin films deposited by hot-wire chemical vapour deposition (HWCVD) in the very low temperature range (125–275°C). The doped layers were obtained by the addition of diborane or phosphine in the gas phase during deposition. The incorporation of boron and phosphorus in the films and their influence on the crystalline fraction are studied by secondary ion mass spectrometry and Raman spectroscopy, respectively. Good electrical transport properties were obtained in this deposition regime, with best dark conductivities of 2.6 and 9.8 S cm −1 for the p- and n-doped films, respectively. The effect of the hydrogen dilution and the layer thickness on the electrical properties are also studied. Some technological conclusions referred to cross contamination could be deduced from the nominally undoped samples obtained in the same chamber after p- and n-type heavily doped layers.

Thin film transistors obtained by hot wire CVD

Hydrogenated microcrystalline silicon films obtained at low temperature (150–280°C) by hot wire chemical vapour deposition at two different process pressures were measured by Raman spectroscopy, X-ray diffraction (XRD) spectroscopy and photothermal deflection spectroscopy (PDS). A crystalline fraction >90% with a subgap optical absortion 10 cm-1 at 0.8 eV were obtained in films deposited at growth rates >0.8 nm/s. These films were incorporated in n-channel thin film transistors and their electrical properties were measured. The saturation mobility was 0.72 ± 0.05 cm2/V s and the threshold voltage around 0.2 eV. The dependence of their conductance activation energies on gate voltages were related to the properties of the material.

Surface passivation of crystalline silicon by Cat-CVD amorphous and nanocrystalline thin silicon films

Abstract In this work, we study the electronic surface passivation of crystalline silicon with intrinsic thin silicon films deposited by Catalytic CVD. The contactless method used to determine the effective surface recombination velocity was the quasi-steady-state photoconductance technique. Hydrogenated amorphous and nanocrystalline silicon films were evaluated as passivating layers on n- and p-type float zone silicon wafers. The best results were obtained with amorphous silicon films, which allowed effective surface recombination velocities as low as 60 and 130 cmxa0s−1 on p- and n-type silicon, respectively. To our knowledge, these are the best results ever reported with intrinsic amorphous silicon films deposited by Catalytic CVD. The passivating properties of nanocrystalline silicon films strongly depended on the deposition conditions, especially on the filament temperature. Samples grown at lower filament temperatures (1600 °C) allowed effective surface recombination velocities of 450 and 600 cmxa0s−1 on n- and p-type silicon.

The role of the buffer layer in the light of a new equivalent circuit for amorphous silicon solar cells

Abstract Although the beneficial effect of the buffer layer between the p- and i-layer of amorphous silicon solar cells has been known for many years, the role of this layer is controversial. This paper examines the effect of the buffer layer using a new equivalent circuit for these devices (Merten et al. IEEE Trans. Electron Dev. 45 (1988) 423–429 [1] ). The parameters of this model can be easily assessed by variable illumination measurements (VIM) of the devices I ( V )-curve. With the model, collection of carriers in the bulk of the cell is easy and clearly separated from the diode behaviour of the device. The VIM-method allows for a complete analysis of the thin film cells, covering both technological and physical topics. It is shown that the dominant effect increasing the efficiency of the cells with buffer layer is the reduction of the hole injection from the p-layer which leads to a reduced diode term. The buffer layer only slightly reduces the recombination in the i-layer. This reduction mainly occurs in a region close to the p/i-interface and cannot be observed with red light (homogeneous carrier generation).

Microcrystalline silicon thin film transistors obtained by hot-wire CVD

Polysilicon thin film transistors (TFT) are of great interest in the field of large area microelectronics, especially because of their application as active elements in flat panel displays. Different deposition techniques are in tough competition with the objective to obtain device-quality polysilicon thin films at low temperature. In this paper we present the preliminary results obtained with the fabrication of TFT deposited by hot-wire chemical vapor deposition (HWCVD). Some results concerned with the structural characterization of the material and electrical performance of the device are presented.

Analysis of the role of mobility-lifetime products in the performance of amorphous silicon p-i-n solar cells

An analytical model of an amorphous silicon p-i-n solar cell is presented to describe its photovoltaic behavior under short-circuit conditions. It has been developed from the analysis of numerical simulation results. These results reproduce the experimental illumination dependence of short-circuit resistance, which is the reciprocal slope of the I(V) curve at the short-circuit point. The recombination rate profiles show that recombination in the regions of charged defects near the p-i and i-n interfaces should not be overlooked. Based on the interpretation of the numerical solutions, we deduce analytical expressions for the recombination current and short-circuit resistance. These expressions are given as a function of an effective μτ product, which depends on the intensity of illumination. We also study the effect of surface recombination with simple expressions that describe its influence on current loss and short-circuit resistance.

Kelvin probe measurements of microcrystalline silicon on a nanometer scale using SFM

Work function measurements on cross-sectioned microcrystalline pin silicon solar cells deposited by Hot-Wire CVD are presented. The experiment is realized by combining a modified Kelvin probe experiment and a scanning force microscope. The measured surface potential revealed that the built-in electric drift field is weak in the middle of the compensated intrinsic layer. A graded donor distribution and a constant boron compensation have to be assumed within the intrinsic layer in order to obtain coincidence of the measurements and simulations. The microcrystalline p-silicon layer and the n-type transparent conducting oxide form a reverse polarized diode in series with the pin diode.

Electronic transport in low temperature nanocrystalline silicon thin-film transistors obtained by hot-wire CVD

Hydrogenated nanocrystalline silicon (nc-Si:H) obtained by hot-wire chemical vapour deposition (HWCVD) at low substrate temperature (150 °C) has been incorporated as the active layer in bottom-gate thin-film transistors (TFTs). These devices were electrically characterised by measuring in vacuum the output and transfer characteristics for different temperatures. The field-effect mobility showed a thermally activated behaviour which could be attributed to carrier trapping at the band tails, as in hydrogenated amorphous silicon (a-Si:H), and potential barriers for the electronic transport. Trapped charge at the interfaces of the columns, which are typical in nc-Si:H, would account for these barriers. By using the Levinson technique, the quality of the material at the column boundaries could be studied. Finally, these results were interpreted according to the particular microstructure of nc-Si:H.