Carmelo Romeo

IDEAL double exposure method for polylevel structures

IDEAL has been proposed as a new double exposure technique to realize k1 equals 0.3 optical lithography. We have applied this technique to complicated 2D structures that can be found in a poly-level of a memory test pattern device. Experimental results showed that IDEAL has a quite large process window also on structured substrate such as SiN and poly-silicon. For the CD target of 0.13 micrometers , exposure latitude larger than 10 percent with a depth of focus larger than 0.5 micrometers was achieved by IDEAL exposure. The alignment latitude of the two reticles used to compose the final lithographic image was larger than +/- 40 nm, moreover line-end shortening effects are also improved by IDEAL exposure.

248 nm Lithography for 180 nm contact holes

In this paper we describe the use of 248 nm lithography to define 0.18 @mm contact holes. For this application we evaluated two Attenuated Phase Shifting Masks (APSM) with transmission 3 and 6 %, in combination with a resist commonly used for binary mask applications. The side lobe effect, that normally limits the lithographic process window in the APSM applications, was decreased by means of a contact hole geometry such as to improve the diffraction pattern. Simulation results and printed wafers confirmed the validity of this approach.

0.3 µm contact layer: process characterisation

In this paper we describe the use of DUV lithography to define 0.3 @mm contact holes onto an interlevel dielectric layer of BPSG which is a strong resist contaminant. Two solutions are proposed and compared in terms of the lithographic process window, critical dimension (CD) control, etch process, resist removal and electrical results on production wafers. As result the use of Brewer Science BARC has been found as an effective solution to improve the process window and to eliminate process integration problems.

New approach to optical proximity correction

A hierarchical rule based optical proximity effect correction approach is presented. The approach has been driven by maskmaking and production requirements to make OPC a practical problem solution. The model based rule generation is presented, as well as benchmark tests on different state-of- the-art test chips.

Device based evaluation of electron projection lithography

As we move technology further and further down the geometry scale we are coming upon imaging situations where our use of existing optical lithography is being questioned due to the lack of process margin in manufacturing lines. This is especially apparent in the imaging of contacts where memory devices, that generally have the densest arrays of these features, may no longer be able to print the desired features. To overcome this it is necessary to either modify the design, a very expensive and time consuming process, or find an imaging process capable of printing the desired features. Electron Projection Lithography (EPL) provides an option to print very small features with a large process margin. In this paper we detail the performance of both memory and logic based designs in an EPL process. We detail the manufacture and results of stencil mask manufacture. Data is also presented showing the imaging results (DOF, exposure latitude, pattern transfer) of features down to 50nm imaged on Nikon’s EB1A tool.

Application of a new approach to optical proximity correction

Optical proximity correction is one of the major hurdles chip manufacturing has to overcome. The paper presents evaluation results of CAPROX OPC, a rule based OPC software. Mask making influences as well as production requirements are discussed. Rule generation, one of the most critical parts in a rule based correction scheme is discussed. Two different applications are presented.