Carolyn Beall

Kesterite Successes, Ongoing Work, and Challenges: A Perspective From Vacuum Deposition

Recent years have seen dramatic improvements in the performance of kesterite devices. The existence of devices of comparable performance, made by a number of different techniques, provides some new perspective on what characteristics are likely fundamental to the material. Here, we review progress in kesterite device fabrication, aspects of the film characteristics that have yet to be understood, and challenges in device development that remain for kesterites to contribute significantly to photovoltaic manufacturing. Performance goals, as well as characteristics of midgap defect density, free carrier density, surfaces, grain boundaries, grain-to-grain uniformity, and bandgap alloying are discussed.

Phase Identification and Control of Thin Films Deposited by Co-Evaporation of Elemental Cu, Zn, Sn, and Se

Kesterite thin films [(i.e., Cu2ZnSn(S,Se)4 and related alloys] have been the subject of recent interest for use as an absorber layer for thin film photovoltaics due to their high absorption coefficient (>104 cm−1), their similarity to successful chalcopyrites (like CuInxGa1−xSe2) in structure, and their earth-abundance. The process window for growing a single-phase kesterite film is narrow. In this work, we have documented, for our 9.15%-efficient kesterite co-evaporation process, (1) how appearance of certain undesirable phases are controlled via choice of processing conditions, (2) several techniques for identification of phases in these films with resolution adequate to discern changes that are important to device performance, and (3) reference measurements for those performing such phase identification. Data from x-ray diffraction, x-ray fluorescence, Raman scattering, scanning electron microscopy, energy dispersive spectroscopy, and current-voltage characterization are presented.

Mechanisms controlling the phase and dislocation density in epitaxial silicon films grown from silane below 800 °C

We construct a phase diagram for silicon layer growth on (001) Si by hot-wire chemical vapor deposition (HWCVD), for rates from 10 to 150 nm/min and for substrate temperatures from 500 to 800 °C. Our results show that a mixed mono and dihydride surface termination during growth causes polycrystalline growth; some H-free sites are needed for epitaxy. For epitaxial films (T>620 °C), the dislocation density decreases with increasing growth temperature because of reduced O contamination of the surface. The best HWCVD epitaxial layers have dislocation densities of 105 cm−2.

Fiber-fed time-resolved photoluminescence for reduced process feedback time on thin-film photovoltaics

Fiber-fed time-resolved photoluminescence is demonstrated as a tool for immediate process feedback after deposition of the absorber layer for CuInxGa(1-x)Se2 and Cu2ZnSnSe4 photovoltaic devices. The technique uses a simplified configuration compared to typical laboratory time-resolved photoluminescence in the delivery of the exciting beam, signal collection, and electronic components. Correlation of instrument output with completed device efficiency is demonstrated over a large sample set. The extraction of the instrument figure of merit, depending on both the initial luminescence intensity and its time decay, is explained and justified. Limitations in the prediction of device efficiency by this method, including surface effect, are demonstrated and discussed.

Sodium-doped molybdenum targets for controllable sodium incorporation in CIGS solar cells

The efficiency of Cu(In, Ga)Se2 (CIGS) solar cells is enhanced when Na is incorporated in the CIGS absorber layer. This work examines Na incorporation in CIGS utilizing Na-doped Mo sputtered from targets made with sodium molybdate-doped (MONA) powder. Mo:Na films with varying thicknesses were sputtered onto Mo-coated borosilicate glass (BSG) or stainless steel substrates for CIGS solar cells. By use of this technique, the Na content of CIGS can be varied from near-zero to higher than that obtained from a soda-lime glass (SLG) substrate. Targets and deposition conditions are described. The doped Mo films are analyzed, and the resulting devices are compared to devices fabricated on Mo-coated SLG as well as Mo-coated BSG with NaF. Completed devices utilizing MONA exceeded 15.7% efficiency without anti-reflective coating, which was consistently higher than devices prepared with the NaF precursor. Strategies for minimizing adhesion difficulties are presented.

Optical function spectra and bandgap energy of Cu2SnSe3

We present the optical function spectra of Cu2SnSe3 determined from 0.30 to 6.45 eV by spectroscopic ellipsometry (SE) at room temperature. We analyze the SE data using the Tauc-Lorentz model and obtain the direct-bandgap energy of 0.49 ± 0.02 eV, which is much smaller than the previously known value of 0.84 eV for the monoclinic-phase Cu2SnSe3. We also perform density-functional theory calculations to obtain the complex dielectric function data, and the results show good agreement with the experimental spectrum. Finally, we discuss the electronic origin of the main optical structures.

Growth kinetics during kesterite coevaporation

Kesterite solar cells have been considered as earth-abundant substitute to chalcopyrites. NRELs 9.2% co-evaporated kesterite solar cell is inspired by the copper-rich growth of co-evaporated chalcopyrites. The excess Cu_xSe_y is believed to conduct liquid-phase assisted grain growth and hence improves the device performance. The effect of the deposition sequence on film growth, morphology, and device performance, are explored in this study. At high deposition temperature, the expected binary precursors of Cu₂ZnSnSe₄ include Cu_xSe_y and ZnSe but not SnSe_x. Because SnSe_x is volatile, the sticking of Sn occurs only if the adsorbed Sn encounters Cu_xSe_y and ZnSe and the formation of kesterite takes place. Otherwise, SnSe_x will be re-evaporated. Here we designed deposition recipes to create precursor films with different ratio between ZnSe/Cu_xSe_y/as-formed kesterite in the first stage, and end the deposition with the same end-point composition. First, it is of interest if the existence of Cu_xSe_y phase provides the opportunity of grain growth analogous to co-evaporating CIGS. Second, by observing the evolution of the substrate temperature during deposition, the reaction progression may be better realized. Third, this series of depositions with different sequence also tells us the saturated Zn level relative to Cu and Sn, and where the excess portion of Zn stays in the film. Finally, the device performance above 9% is briefly presented.

Toward film-silicon solar cells on display glass

We describe recent progress in developing epitaxial film crystal silicon (c-Si) solar cells that can be grown at low temperature (<760 °C) on seed-on-glass substrates. This low-cost approach is enabled by rapid epitaxy (up to 300 nm/min) of Si films with low dislocation density (< 1×105 cm⁻²) at glass-compatible temperatures by hot-wire chemical vapor deposition (HWCVD). Epitaxial test cells on heavily-doped ‘dead’ Si wafers provide insight into the quality of the Si absorber and the physics that limit device performance. Our best 2–3 µm thick, film silicon heterojunction (c-Si/a-Si) solar cells have reached ∼6.7% efficiency (V<inf>oc</inf> ∼ 570 mV, J<inf>sc</inf> ∼18 mA/cm⁻²) without rapid thermal anneal, defect passivation or light trapping. Unpassivated dislocations are strong recombination centers and limit effective minority carrier diffusion lengths to less than 15–20 µm (roughly half the distance between dislocations). We also report devices without light-trapping on layer-transfer Si seed layers bonded to display-glass; these seed layers template growth of high-quality HWCVD cSi. Our initial devices have V<inf>oc</inf> = 460 mV, J<inf>sc</inf> = 16.2 mA/cm², Eff. = 4.8 %, but will benefit from post-growth anneals, hydrogenation and new surface treatments before epitaxy. We discuss junction transport physics in the devices and explore the role of post-growth H-passivation and rapid thermal annealing treatments on device performance.

Temperature dependence of equivalent circuit parameters used to analyze admittance spectroscopy and application to CZTSe devices

We present a device physics and equivalent circuit model for admittance spectroscopy of CZTSe based photovoltaic devices. The experimental variations of the capacitance and conductance in the depletion width are reproduced for state of the art coevaporated CZTSe devices. We will show that simple Arrhenius analysis of the main capacitance step seen in CZTSe results in erroneous values for the dominant acceptor energy. We will also show that the bulk resistivity in the quasi-neutral region (QNR), even in the presence of the dominant acceptor freezeout, cannot account for the observed increase in series resistance which is responsible for the temperature dependent frequency shift of the capacitance step. Thus, we suggest that dopant freezeout must affect another component of the lumped series resistance such as a non-Ohmic back contact.

Photoelectron spectroscopy, and photovoltaic device study of Cu 2 ZnSnSe 4 and ZnO x S 1−x buffer layer interface

Recent research has enabled Cu2ZnSnSe4 (CZTSe) to reach efficiencies close to 10% in photovoltaic devices with CdS as the junction partner and over 12% when the CZTSe is alloyed with sulfur. Little work, however, has been reported on the potential for wide band gap, Cd-free buffer layers in these devices. Reported here are photoelectron spectroscopy measurements (XPS/UPS) of the band energy positions between CZTSe and zinc oxysulfide (ZnOS) with sputter depth profiling. Measurements indicate the formation of a large conduction band offset (CBO) of 1.2 eV with chemical-bath deposition (CBD) of ZnOS on CZTSe (Eg = 0.96 eV). However, Ar ion sputter depth profiling is shown to produce compositional changes of the ZnOS thin film resulting in an apparent increase of the valence band maximum (VBM) for the buffer layer. With this in mind, the valence band edge energy offsets (VBO) are calculated and used to study solar cells made with the configuration glass/Mo/CZTSe/ZnOS/i-ZnO/Al:ZnO/Ni/Al. Variation of the deposition time of the ZnOS buffer layer during the CBD process has led to device efficiencies above 5%. For the thinnest ZnOS buffer layers, the short-circuit current matches that of devices with CdS buffer layers, but suffers from loss of open-circuit voltage. Interpretation of the solar cell measurements are aided by SCAPS thin-film device modeling.