Ch. Sargentis

Simple method for the fabrication of a high dielectric constant metal-oxide-semiconductor capacitor embedded with Pt nanoparticles

We present a simple method for the fabrication of Pt nanoparticles embedded in a high-k dielectric. The nanoparticles are formed during the first deposition stages of a thin Pt layer on a 30A SiO2 tunneling layer, at room temperature, performed with electron-beam (e-beam) evaporation of metallic Pt. Then, the nanoparticles are covered, in situ, by a thicker HfO2 layer, which forms a control oxide. The fabricated nanoparticles have an average diameter of 4.9nm, sheet density of 3.2×1012cm−2 and they present high uniformity in their size. High-frequency capacitance-voltage (C-V) measurements demonstrate that this structure operates as a memory device.

Fabrication and characterization of a metal nanocrystal memory using molecular beam epitaxy

Recently, single and few electron devices have attracted a lot of attention due to their advantages when compared to the conventional DRAM or Flash memories. There is also a great effort to replace the silicon oxide (SiO2) with materials of high dielectric constant that could allow the further downscaling of MOSFET devices. In this work, initially we study the hafnium oxide (HfO2) deposition on thin SiO2. We fabricate a HfO2 layer, with good dielectric properties and with high dielectric constant. Then, we fabricate a novel MOS memory device with platinum (Pt) nanoparticles embedded in the HfO2/SiO2 interface.

A modeling of the retention characteristics of non-volatile memories embedded with metallic nanoparticles

Despite the technological maturity of non-volatile memories (NVMs) embedded with metal or semiconductor nanoparticles (NPs) there is still considerable controversy over their discharging behaviour when the writing voltage is removed. Exponential [1,2] and logarithmic [3,4] discharge laws coexist in the literature.

Synthesis and Electrical Characterization of a MOS Memory Containing Pt Nanoparticles Deposited at a SiO 2 / HfO 2 Interface

MOS memory devices containing semiconductor nanocrystals have drawn considerable attention recently, due to their advantages when compared to the conventional memories. Only little work has been done on memory devices containing metal nanoparticles. We describe the fabrication of a novel MOS device with embedded Pt nanoparticles in the HfO 2 / SiO 2 interface of a MOS device. Using as control oxide, a high-k dielectric, our device has a great degree of scalability. The fabricated nanoparticles are very small (about 5 nm) and have high density. High frequency C-V measurements demonstrate that this device operates as a memory device.

Growth and electrical characterisation of highly doped p-SiGe/Si heterostructures

Abstract Electrical resistivity and Hall measurements have been performed, on strained B-heavily doped Si0.8Ge0.2 epilayers grown by molecular beam epitaxy (MBE) technique, in the temperature range 80–350 K. In-plane Hall mobility and concentration of the free holes were extracted and discussed taking into account the high doping level effects, scattering mechanisms as well as previous drift mobility results.