P. Normand

Charge storage and interface states effects in Si-nanocrystal memory obtained using low-energy Si^ implantation and annealing

Thin SiO2 oxides implanted by very-low-energy (1 keV) Si ions and subsequently annealed are explored with regards to their potential as active elements of memory devices. Charge storage effects as a function of Si fluence are investigated through capacitance and channel current measurements. Capacitance–voltage and source–drain current versus gate voltage characteristics of devices implanted with a dose of 1×1016 cm−2 or lower exhibit clear hysteresis characteristics at low electric field. The observed fluence dependence of the device electrical properties is interpreted in terms of the implanted oxide structure.

Manipulation of two-dimensional arrays of Si nanocrystals embedded in thin SiO2 layers by low energy ion implantation

In silicon nanocrystal based metal–oxide–semiconductor memory structures, tuning of the electron tunneling distance between the Si substrate and Si nanocrystals located in the gate oxide is a crucial requirement for the pinpointing of optimal device architectures. In this work it is demonstrated that this tuning of the “injection distance” can be achieved by varying the Si+ ion energy or the oxide thickness during the fabrication of Si nanocrystals by ultralow-energy silicon implantation. Using an accurate cross-section transmission electron microscopy (XTEM) method, it is demonstrated that two-dimensional arrays of Si nanocrystals cannot be positioned closer than 5 nm to the channel by increasing the implantation energy. It is shown that injection distances down to much smaller values (2 nm) can be achieved only by decreasing the nominal thickness of the gate oxide. Depth profiles of excess silicon measured by time-of-flight secondary ion mass spectroscopy and Si nanocrystal locations determined by XTEM ...

Structural and electrical properties of silicon dioxide layers with embedded germanium nanocrystals grown by molecular beam epitaxy

A sheet of spherical, well-separated, crystalline Ge nanodots embedded in SiO2 on top of a p-(001)Si wafer was fabricated by molecular beam epitaxy (MBE) combined with rapid thermal processing and characterized structurally and electrically. The average size of the Ge nanodots was estimated to be 4.5 nm with an average aerial density of 3×1011 cm−2, situated at 4.4 nm in average away from the Si/SiO2 interface. Significant charge storage effects were observed through capacitance–voltage measurements of metal–oxide–semiconductor capacitors.

Hybrid silicon-organic nanoparticle memory device

We demonstrate a nonvolatile electrically erasable programmable read-only memory device using gold nanoparticles as charge storage elements deposited at room temperature by chemical processing. The nanoparticles are deposited over a thermal silicon dioxide layer that insulates them from the device silicon channel. An organic insulator deposited by the Langmuir–Blodget technique at room temperature separates the aluminum gate electrode from the nanoparticles. The device exhibits significant threshold voltage shifts after application of low-voltage pulses (⩽±6 V) to the gate and has nonvolatile retention time characteristics.

Effect of annealing environment on the memory properties of thin oxides with embedded Si nanocrystals obtained by low-energy ion-beam synthesis

The effect of annealing in diluted oxygen versus inert environment on the structural and electrical characteristics of thin silicon dioxide layers with embedded Si nanocrystals fabricated by very low-energy silicon implantation (1 keV) is reported. Annealing in diluted oxygen increases the thickness of the control oxide, improves the integrity of the oxide and narrows the size distribution of the nanocrystals without affecting significantly their mean size (∼2 nm). Strong charge storage effects at low gate voltages and enhanced charge retention times are observed through electrical measurements of metal-oxide-semiconductor capacitors. These results indicate that a combination of low-energy silicon implants and annealing in diluted oxygen allows for the fabrication of improved low-voltage nonvolatile memory devices.

Room-temperature single-electron charging phenomena in large-area nanocrystal memory obtained by low-energy ion beam synthesis

We investigated the dependence of implantation dose on the charge storage characteristics of large-area n-channel metal–oxide–semiconductor field-effect transistors with 1-keV Si+-implanted gate oxides. Gate bias and time-dependent source–drain current measurements are reported. Devices implanted with 1×1016 cm−2 Si dose exhibit a continuous (trap-like) charge storage process under both static and dynamic conditions. In contrast, for 2×1016 cm−2 implanted devices, electrons are stored in Si nanocrystals in discrete units at low gate voltages, as revealed by a periodic staircase plateau of the source–drain current with a low gate voltage sweep rate, and the step-like decrease of the time-dependent monitoring of the channel current. These observations of room-temperature single-electron storage effects support the pursuit of large-area devices operating on the basis of Coulomb blockade phenomena.

Graphene‐Modified Interface Controls Transition from VCM to ECM Switching Modes in Ta/TaOx Based Memristive Devices

By modification of the electrode-solid-electrolyte interface with graphene, transit from valence change memories (VCM) to electrochemical metallization memories (ECM) in the cell Ta(C)/Ta2 O5 /Pt is demonstrated, thus, bridging both mechanisms. The ECM operation is discussed in the light of Ta-cation mobility in TaOx . The crucial role of electrochemical processes and moisture in the resistive switching process is also highlighted.

Diffusivity measurements of silicon in silicon dioxide layers using isotopically pure material

We report measurement of the silicon diffusion coefficient in silicon dioxide films using isotopically enriched 28Si silicon dioxide layers that enable relatively low 30Si concentration measurements to be performed using secondary ion mass spectrometry. Two types of experiments are made. 30Si atoms are introduced in excess in a stoichiometric isotopically pure silicon dioxide layer either by ion implantation or by a predeposition technique. These experiments are representative of any physical situation in which excess silicon atoms are introduced into silicon dioxide layers during silicon processing. The estimated diffusivity values are significantly higher than previously reported values for Si diffusion within a stoichiometric oxide and closer to reported values for excess Si diffusion within an oxide. The activation energy of the diffusivity is found to be 4.74 eV.

Transmission electron microscopy measurements of the injection distances in nanocrystal-based memories

The characteristics of nonvolatile memories making use of Si nanocrystals as charge storage elements buried in the gate oxide of regular metal–oxide–semiconductor transistors strongly depend on the distances between the nanocrystals and two electrodes, the channel and the gate. In this letter, we compare two transmission electron microscopy methods that can be used to extract such distances. We demonstrate by using image simulations that conventional electron microscopy under out-of-Bragg and strongly underfocused conditions is the fastest and most efficient technique to be used for routine measurements at a subnanometer resolution. Finally, we show that the injection oxide thickness of nanocrystal devices obtained by low-energy Si implantation into thin SiO2 layers and subsequent annealing can be precisely tuned from 8 to 5 nm by adjusting the implantation energy from 0.65 to 2 keV.

Fabrication of single crystal Si cantilevers using a dry release process and application in a capacitive-type humidity sensor

A process is presented for the fabrication of suspended silicon microstructures, such as cantilevers and open type membranes, constituting the movable plate of a capacitor at a small distance over the silicon substrate. The process relies on the silicon fusion bonding of two wafers and features dry release of the suspended silicon structures at the final stage of the process, as a step to prevent stiction. With the addition of a hydrophilic polymer film on the Si cantilevers, a capacitive type humidity sensor is fabricated; the moisture-dependent bending of the microcantilever reflects on the measured capacitance between the microcantilever and substrate.