Chak Wah Tang

High-Temperature Operation of AlGaN/GaN HEMTs Direct-Coupled FET Logic (DCFL) Integrated Circuits

This letter presents the high-temperature performance of AlGaN/GaN HEMT direct-coupled FET logic (DCFL) integrated circuits. At 375 degC, enhancement-mode (E-mode) AlGaN/GaN HEMTs which are used as drivers in DCFL circuits exhibit proper E-mode operation with a threshold voltage (VTH) of 0.24 V and a peak current density of 56 mA/mm. The monolithically integrated E/D-mode AlGaN/GaN HEMTs DCFL circuits deliver stable operations at 375 degC: An E/D-HEMT inverter with a drive/load ratio of 10 exhibits 0.1 V for logic-low noise margin (NML) and 0.3 V for logic-high-noise margin (NMH) at a supply voltage (VDD) of 3.0 V; a 17-stage ring oscillator exhibits a maximum oscillation frequency of 66 MHz, corresponding to a minimum propagation delay ( taupd) of 446 ps/stage at VDD of 3.0 V

Effects of hydrogen implantation damage on the performance of InP/InGaAs/InP p-i-n photodiodes transferred on silicon

Functioning InP/InGaAs/InP p-i-n photodiodes were integrated onto a Si substrate using hydrogen-induced layer transfer process (ion cut) combined with selective chemical etching. This device transfer process minimizes the hydrogen implantation-induced damage and simultaneously improves the transferred surface flatness for device processing. After transfer, the dark current under the reverse bias increased by ∼1.5 times over that of the as-grown photodiodes at −1.5 V, while the photoinduced current was comparable to that of the as-grown sample. These results were discussed in terms of interactions between minority carriers and the remaining implantation-induced damage.

InP Layer Transfer with Masked Implantation

InP layer transfer with masked implantation was investigated to eliminate ion-implantation induced damage involved in the ion-cut process. InP donor wafers were selectively implanted with hydrogen through a mask at a dose of 8.5 X 10 16 ions/cm 2 at 160 keV. The layers which were subsequently mechanically exfoliated were characterized by large pyramidal protrusions on the surface, associated with the unimplanted regions. This undesirable morphology was bypassed through the inclusion of a selective etch-stop layer. The resulting structures possessed flat surfaces suitable for further bonding. This process enables the transfer of finished devices, unaffected by ion-implantation, onto a variety of desirable substrates.

Monolithic LED Microdisplay on Active Matrix Substrate Using Flip-Chip Technology

A monolithic high-resolution (individual pixel size 300times300 mum2) active matrix (AM) programmed 8times8 micro-LED array was fabricated using flip-chip technology. The display was composed of an AM panel and a LED microarray. The AM panel included driving circuits composed of p-type MOS transistors for each pixel. The n-electrodes of the LED pixels in the microarray were connected together, and the p-electrodes were connected to individual outputs of the driving circuits on the AM panel. Using flip-chip technology, the LED microarray was then flipped onto the AM panel to create a microdisplay.

High-Performance Inverted

We report inverted-type In_0.51Al_0.49As/In_0.53Ga_0.47As MOSHEMTs heteroepitaxially grown on GaAs substrates by metal-organic chemical vapor deposition. High 2-D electron gas Hall mobility values of 8200 cm²/V · s at 300 K and 33 900 cm²/V · s at 77 K have been achieved. The buried quantum-well channel design is combined with selectively regrown source/drain (S/D) using a gate-last process. A 120-nm-channel-length MOSHEMT exhibited a maximum drain current of 1884 mA/mm, peak transconductance of 1126 mS/mm at <i>V</i>_ds = 0.5 V, and a subthreshold slope of 135 mV/dec at <i>V</i>_ds = 0.05 V. With the regrown S/D, an ultralow on-state resistance of 156 Ω·μm was obtained.

\hbox{In}_{0.53} \hbox{Ga}_{0.47}\hbox{As}

Using GaN-on-Si epilayers, for the first time, fully vertical p-i-n diodes are demonstrated after Si substrate removal, transfer, and n-electrode formation at the top of the device. After SiO2 sidewall passivation, the vertical p-i-n diodes, with n-GaN facing up, exhibit VON of 3.35 V at 1 A/cm2, a low differential ON-resistance of 3.3 mΩcm2 at 300 A/cm2, and a breakdown voltage of 350 V. The corresponding Baligas figure of merit is 37.0 MW/cm2, a very good value for GaN-based p-i-n rectifiers grown on Si substrates. The results indicate that fully vertical rectifiers using GaN-on-Si epilayers have great potential in achieving cost-effective GaN devices for high-power and high-voltage applications.

MOSHEMTs on a GaAs Substrate With Regrown Source/Drain by MOCVD

We report a comparison of material and device characteristics of metamorphic In0.53Ga0.47As channel metal-oxide-semiconductor high-electron mobility transistors (MOSHEMTs) grown on GaAs and Si substrates by metal-organic chemical vapor deposition. A gate-last process was developed to simplify the fabrication of nanoscale channel length devices. Selective source/drain regrowth was incorporated to reduce parasitic resistances. Post-metallization annealing (PMA) was utilized to mitigate the weakened gate electrostatic control in the buried channel. The effect of PMA on the Ti/Al2O3 gate-stack was investigated in detail. Record-low ON-state resistance of 132 and 129 Ω·μm has been achieved in enhancement-mode InGaAs MOSHEMT on GaAs and on Si substrate, respectively. A 120-nm channel length device on GaAs exhibited a figure of merit Q(gm/SS) of 12, whereas a 60-nm channel length In0.53Ga0.47As MOSHEMT on Si demonstrated Q up to 14.

Fully Vertical GaN p-i-n Diodes Using GaN-on-Si Epilayers

We report inverted-type In_0.51Al_0.49As/In_0.53Ga_0.47As MOSHEMTs grown by MOCVD on a Si substrate. n⁺⁺ InGaAs with an electron density of 4.5 × 10¹⁹ cm^-3 was selectively regrown in the source/drain regions to reduce parasitic resistance while eliminating the conventional gate recess etching. A 30-nm-channel-length device was successfully demonstrated with a maximum drain current of 1698 mA/mm, a peak transconductance of 1074 mS/mm at V_ds = 0.5 V, a subthreshold slope of 172 mV/dec at V_ds = 0.05 V, and a record-low on-resistance of 133 Ω·μm. An effective mobility of 4805 cm²/V· s was also extracted, indicating the high-quality metamorphic growth by MOCVD. In addition, the scalability of the inverted MOSHEMT on a Si substrate from 1 μm down to 30 nm was investigated.

Material and Device Characteristics of Metamorphic

Inverted-type In0.51Al0.49As/In0.53Ga0.47As metal–oxide–semiconductor high-electron-mobility transistor grown by metal organic chemical vapor deposition on a Si substrate was demonstrated. 8 nm atomic-layer-deposited Al2O3 was used as gate dielectric. N++ InGaAs with an electron density of 4.5×1019 cm-3 was selectively regrown in the source/drain regions to reduce parasitic resistance while eliminating the conventional gate recess etching. 130-nm channel-length devices have exhibited a drain current up to 2.03 A/mm at Vds=0.6 V and an ultralow on-resistance of 163 Ω µm. An effective mobility of 2975 cm2 V-1 s-1 was also extracted, indicating the high-quality epitaxial growth by metal organic chemical vapor deposition.

{\rm In}_{0.53}{\rm Ga}_{0.47}{\rm As}

Metamorphic AlInAs/GaInAs high-electron mobility transistors with very good device performance have been grown by metal-organic chemical vapor deposition (MOCVD), with the introduction of an effective multistage buffering scheme. Measured room-temperature Hall mobilities of the 2-DEG were over 8000 cm2/V ldr s with sheet carrier densities larger than 4 times 1012 cm-2. Transistors with 1-mum gate length exhibited transconductance up to 626 mS/mm. The unity current gain cutoff frequency fT and the maximum oscillation frequency fmax were 39.1 and 71 GHz, respectively. These results are very encouraging toward the manufacturing of metamorphic devices on GaAs substrates by MOCVD.