Chang-Seok Chae

A Single-Inductor Switching DC–DC Converter With Five Outputs and Ordered Power-Distributive Control

An integrated 5-output single-inductor multiple-output DC-DC converter with ordered power-distributive control in a 0.5mum BiCMOS process is presented. The converter has four main positive boost outputs programmable from +5 to +12V and one dependent negative output from -12 to -5V. A maximum efficiency of 80.8% is achieved at a total output power of 450mW, with a switching frequency of 700kHz.

A Single-Inductor Step-Up DC-DC Switching Converter with Bipolar Outputs for Active Matrix OLED Mobile Display Panels

A single-chip dual-output step-up DC-DC converter is implemented for active-matrix OLED mobile display panels. The bipolar outputs are regulated independently and integrated with a boost and a charge-pump topology sharing a single inductor. The chip is 4.1mm2 fabricated in a 0.5 mum power BiCMOS process and operates at 1MHz with a maximum efficiency of 82.3% at an output power of 330mW.

A Single-Inductor Step-Up DC-DC Switching Converter With Bipolar Outputs for Active Matrix OLED Mobile Display Panels

A single-inductor step-up DC-DC switching converter with bipolar outputs is implemented for active-matrix OLED mobile display panels. The positive output voltage is regulated by a boost operation with a modified comparator control (MCC), and the negative output voltage is regulated by a charge-pump operation with a proportional-integral (PI) control. The proposed adaptive current-sensing technique successfully supports the implementation of the proposed converter topology and enables the converter to work in both discontinuous-conduction mode (DCM) and continuous-conduction mode (CCM). In addition, with the MCC method, the converter can guarantee a positive output voltage that has both a fast transient response of the comparator control and a small output voltage ripple of the PWM control. A 4.1 mm2 converter IC fabricated in a 0.5 mum power BiCMOS process operates at a switching frequency of 1 MHz with a maximum efficiency of 82.3% at an output power of 330 mW.

A PLL-based high-stability single-inductor 6-channel output DC-DC buck converter

Cost and size are very important issues for power-management ICs (PMICs), in particular for portable systems where typically multiple voltage levels are required to achieve multi functionality. To meet these requirements, a single-inductor multiple-output (SIMO) switching converter is a very strong candidate. SIMO converters have been the subject of many recent studies and reports [1–3]. The presented converters uses the current-mode controller and PWM with a constant switching frequency. However, designing the feedback control loop of the PWM converters is not an easy task since their stability inherently depends on the load conditions.

Power-efficient series-charge parallel-discharge charge pump circuit for LED drive

A charge pump drive circuit for LED lighting is proposed. This circuit is realized with repeated use of a compact unit module consisted of a capacitor and diodes. The series-charge and parallel-discharge operation gives the efficiency better than the conventional converters with AC line input. This paper also shows how to minimize the number of modules for a given number of LEDs. A prototype implemented the charge pump drive circuit shows a maximum efficiency of 95% for 22 LEDs in series with the AC line voltage of 220 Vrms.

A CMOS Variable Gain Amplifier with Wide Dynamic Range and Accurate dB-Linear Characteristic

A novel CMOS variable gain amplifier (VGA) with high frequency, wide dynamic range and accurate dB-linear gain control for WCDMA direct-conversion receiver is proposed. To achieve conflicting performances such as high linearity and wide dynamic range with constraints of low power dissipation, it is necessary for VGA to have an accurate gain control characteristic and a wideband gain cell (VGA cell) with high gain at low voltage. Therefore, a new VGA cell is proposed to achieve both high dynamic range and wideband at low supply voltage. Wideband operation is also achieved using novel active load with gain boosting. In a proposed exponential voltage function generator using parasitic bipolar transistor, it is possible to compensate some deviation of its slope against temperature and process variations. The VGA has a controllable gain range of -20 dB ~+55 dB which can be controlled by adjusting the external control voltage and enhanced operating frequency range up to 150 MHz

Fast switching charge dump assisted Class-D audio amplifier with high fidelity and high efficiency

A fast switching charge dump assisted class-D audio amplifier is presented in this paper. To achieve high efficiency and high linearity, the Class-K* audio amplifier consists of the class D amplifier with high efficiency and the proposed charge dump amplifier with high linearity. The charge pump amplifier works at faster switching frequency than class D amplifier so as to compensate the distortion caused by switching of the class-D amplifier. The class-K* audio amplifier implemented in 0.35mum CMOS process shows -71.8 dB THD+N at 1 KHz and a maximum efficiency of 81% at an output power of 257 mW for 4.1Omega load.

A High-Performance Fast Switching Charge Dump Assisted Class-

A new Class-K* audio amplifier with high-power efficiency and high fidelity is integrated in a 0.35-μm CMOS process. It proposes a new topology connected Class-D amplifier with fast-switching charge-dump (FSCD) amplifier in parallel. The integration of the amplifier requires neither analog buffer amplifier nor a complex compensation circuit needed in hybrid audio amplifier (Class-K). The FSCD amplifier composed of comparators and switches works at a high-switching frequency in order to absorb the distortion caused by Class-D amplifier switching. Thus, this assists the audio amplifier to have good linearity under switching operation. With the proposed topology, the audio amplifier has a flat frequency response with - 3-dB bandwidth of 60 KHz and is capable of delivering up to 257 mW into 4.1-Ω load with maximum efficiency of 81%. A typical total harmonic distortion plus noise (THD+N) is less than 0.1% at the power level over 25 mW within the audio frequency range (20 Hz-20 kHz), and the minimum THD+N is 0.025% with the audio input frequency of 1 kHz at the output power of 114 mW.

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Polar modulation, where a constant-amplitude phase signal is amplified by an efficient switched-mode power amplifier (PA) and an envelope signal is modulated at the drain of the PA, has been proven to improve efficiency and linearity of the PA system. However, the amplitude modulator (AM) used in such modulation systems must have wide bandwidth, low switching ripple and high efficiency. Although several AM structures have been reported the hybrid switching amplitude modulator (HSAM) shows excellent performance [1–3]. The HSAM consists of a linear amplifier as a voltage source and a switching amplifier as a dependant current source. The linear amplifier using voltage feedback defines output voltage with high frequency information in a bandwidth-expanded envelope signal and the switching amplifier using current feedback drives almost all the current to develop output voltage with the help of a current sensing circuit. If the current sensing circuit does not work well, it makes an offset to the switching amplifier and results in additional power consumption of the linear amplifier [2]. To meet a stringent spectral mask, low output impedance of the linear amplifier is needed [1]. In conclusion, wide bandwidth and low output impedance of the linear amplifier, and accurate current sensing are critical points in the design of the HSAM.

Audio Amplifier

A fully on-chip CMOS VGA-based load- independent linear amplitude modulator is implemented for class E1, E2 power amplifiers of GSM/EDGE polar transmitter. By utilizing VGA-based 3-path architecture based on capacitor-free low-dropout linear regulator (LDO), the proposed circuit provides fast and stable operation at all-load conditions including open load when the battery varies from 3.4 V to 5.5 V. The small-signal bandwidth is wider than 5 MHz and the phase margin is bigger than 64deg at the worst-case-simulation condition. The circuit can stably drive output load-current of 0 to 1.6 A at a static bias-current of under 1 mA. The output voltage varies from 0.43 V to 3.2 V when the input reference-voltage VRAMP varies from 0.2 V to 1.5 V. The chip is fabricated in a TSMC 0.35 mum mixed-mode CMOS 2P 4M process and the size of pass transistor is 1.6 mm times 1 mm.