Charis Basetas

Single-bit-output all-digital frequency synthesis using multi-step look-ahead bandpass Σ-Δ modulator-like quantization processing

A configurable single-bit-output Σ-Δ modulator variant is presented, which improves upon stability and dynamic range. The derivation of the proposed modulation scheme from the Σ-Δ error-feedback structure and its mathematical description are analyzed, while its application in fractional-N frequency dividers and all-digital frequency synthesizers is investigated. It is shown that stable high-order noise shaping is possible even when using noise transfer functions that are unstable in a conventional Σ-Δ modulator loop. Furthermore, multipliers can be avoided if the noise transfer function coefficients are chosen appropriately, leading to a low complexity hardware implementation. In special cases the architecture is equivalent to another Σ-Δ modulator with a different, stable, NTF than the initial one. The effectiveness of the proposed modulation scheme is demonstrated by specific examples for each application.

Delta-sigma modulation techniques to reduce noise and spurs in all-digital RF transmitters

This paper proposes a compact RF all-digital transmitter that is based on a direct digital synthesizer topology combined with Sigma-Delta modulation and other digital techniques to produce a spurs-free, high-frequency, single or few bit output with improved noise floor performance.

Single-bit all digital frequency synthesis with homodyne sigma-delta modulation for Internet of Things applications

All-digital frequency synthesis architectures with direct modulation capability, based on single-bit sigma-delta modulation loop with an innovative homodyne band-pass filter topology are presented focusing on wireless Internet of Things (IoT) applications. A hardware-efficient multiplier-free variation of the homodyne filter is also proposed. MATLAB simulation results for 16-QAM modulation demonstrate the capabilities of the proposed architectures.

Wide-band frequency synthesis using hardware-efficient band-pass single-bit multi-step look-ahead sigma-delta modulators

Band-pass sigma-delta modulators (SDMs) can be used for all-digital frequency synthesis with low noise in the SDM passband. To avoid mixed-signal components such as DACs, a single-bit output is required. The noise shaping characteristics of single-bit sigma-delta modulators are limited by stability requirements. Look-ahead SDMs have been proposed to increase the bandwidth and signal-to-noise-and-distortion ratio (SNDR) of conventional single-bit ones. The cost is increased hardware complexity, but Multi-Step Look-Ahead sigma-delta modulators (MSLA SDMs) can significantly reduce the required hardware complexity, while retaining the advantages of look-ahead SDMs. This work demonstrates the hardware requirements of MSLA SDMs and proposes an all-digital frequency synthesizer architecture based on band-pass MSLA SDMs. The performance of the poposed synthesizer architecture is investigated for various configurations. Finally, the advantages of using MSLA SDMs instead of conventional single-bit ones in terms of bandwidth and SNDR are quantified.

32-QAM all-digital RF signal generator based on a homodyne sigma-delta modulation scheme

An all-digital sigma-delta modulator (SDM) based RF synthesizer is presented. A multiplier-less architecture for the implementation of the band-pass SDM loop filter is proposed. Furthermore, this architecture enables the adjustment of the loop filter central frequency by exploiting homodyne up- and down-conversion. The RF synthesizer is comprised of a direct digital synthesizer (DDS) and the proposed multiplier-less single-bit band-pass SDM. Due to the simplicity of the synthesizer building blocks very high generated frequencies are possible. Modualtion is easily incorporated and as a test case its performance in a 32-QAM modulation scheme is presented.

Frequency synthesis using low-pass single-bit multi-step look-ahead sigma-delta modulators in quadrature upconversion scheme

All-digital frequency synthesis using two low-pass single-bit Multi-Step Look-Ahead sigma-delta modultors (MSLA SDMs) is presented. MSLA SDMs provide better noise shaping characteristics, i.e. SNDR and bandwidth, than conventional SDMs at the cost of higher hardware complexity. The balance between complexity and performance is adjusted by the number of look-ahead steps, which is an additional design parameter. The frequency synthesizer system is comprised of two identical low-pass single-bit MSLA SDMs. Their inputs are orthogonal sinusoidals generated by a direct digital synthesizer (DDS). The frequency range of the synthesizer using a single clock signal is determined by the oversampling ratio (OSR) of the SDMs. A lower OSR results in a wider frequency range, but reduces the output SNDR. System-level simulation results of the frequency synthesizer are presented, showcasing the performance advantage of using MSLA SDMs instead of conventional ones.

The class of 1-bit Multi-Step Look-Ahead ΣΔ modulators and their applications

The class of 1-bit Multi-Step Look-Ahead (MSLA) ΣΔ modulators is presented. They take into account current and future quantization errors improving upon the stability and noise shaping characteristics of conventional 1-bit ΣΔ modulators. The MSLA modulator system is found to be equivalent to a number of parallel conventional ΣΔ modulators sharing a multi-input 1-bit quantizer. The number of look-ahead steps along with other design parameters enable fine-tuning of performance vs. hardware complexity according to the application. The performance of MSLA modulators for various design parameter values is investigated, highlighting their advantages in a multitude of applications like digital transmitters, class-D power amplifiers and DACs.

All-digital single-bit-output RF transmitters using homodyne sigma-delta modulation

An all-digital RF transmitter architecture capable of driving directly a switching RF power amplifier and therefore without the need of a high-speed RF DAC is presented. Modulation is achieved by directly modulating a direct digital synthesizer (DDS) generated signal. The proposed architecture is based on single-bit sigma-delta modulation using the introduced homodyne band-pass filter topology, which allows for the adjustment of its central frequency without changing its coefficients. This is achieved by using variable frequency homodyne down- and up-conversion along with a low-pass filter with fixed coefficients. Furthermore, a multiplier-less homodyne filter topology is shown to be possible, greatly reducing the hardware requirements for its implementation. MATLAB simulation results are presented based on a 64-QAM modulation scheme demonstrating the capabilities of the proposed architecture.

Derivation of the transfer functions of 1-bit Multi-Step Look-Ahead ΣΔ modulators using system identification methods

A method to calculate the transfer functions of Multi-Step Look-Ahead (MSLA) ΣΔ modulators is presented. MSLA ΣΔ modulators exhibit better noise shaping characteristics and stability than conventional ones. They are comprised of a number of conventional ΣΔ modulators in parallel, sharing a multi-input 1-bit output quantizer. MSLA modulators are highly nonlinear systems due to the multi-input quantizer. Modeling of the quantizer using conventional linearization methods does not give satisfactory results. Therefore, this work applies system identification methods to derive the linearized MSLA modulator system transfer functions. More specifically the Vector Fitting algorithm is used for the linearization of a number of MSLA modulators. The obtained transfer functions are in very good agreement with simulation results, showcasing the effectiveness of the applied methods.

Hardware implementation aspects of Multi-Step Look-Ahead Σ-Δ modulation-like architectures for all-digital frequency synthesis applications

This work discusses hardware implementation considerations for a novel Multi-Step Look-Ahead modulation architecture which improves on the stability and dynamic range of conventional Σ-Δ modulators for all-digital frequency synthesis applications. The basic theoretical concepts of the architecture are analyzed and an appropriate general hardware implementation of the required mathematical operations is presented. It is shown that hardware complexity reduction is possible when noise-shaping filters with convenient coefficients are utilized. Moreover, FPGA and IC implementation examples for a specific noise-shaping filter are given, accompanied by power, area and delay estimations.