Charles J. Persico

Effect of out-of-band terminations on intermodulation distortion in common-emitter circuits

This paper presents the results of Volterra series analysis of the third-order intermodulation distortion in common-emitter circuits. The derived closed-form expression shows how out-of-band source and load impedances affect the distortion. The expression was used to optimally tune the input matching network of a 2 GHz Si BJT LNA at the sub- and second-harmonic frequencies for a higher IIP/sub 3/. While the in-band noise figure, gain and input return loss were not affected, the peak IIP/sub 3/ increased by 14 dB.

A cellular-band CDMA 0.25-/spl mu/m CMOS LNA linearized using active post-distortion

The theory of a linearization method using active post-distortion (APD) is explained for low-frequency and high-frequency applications. The low-frequency cancellation is explained in power series format and the high-frequency cancellation is explained in Volterra series format. The method is utilized for a cellular band (869-894 MHz) CDMA low-noise amplifier (LNA), which is implemented in 0.25-mum CMOS process. The LNA achieves 1.2 dB NF, 16.2 dB power gain, and +8 dBm IIP3 while consuming 12 mA current from 2.6 V supply voltage. It shows 13.5 dB of IM3 product reduction with 0.15 dB NF penalty in comparison with an LNA which does not use the APD method

A highly-integrated tri-band/quad-mode SiGe BiCMOS RF-to-baseband receiver for wireless CDMA/WCDMA/AMPS applications with GPS capability

A 0.5 μm SiGe BiCMOS single-chip receiver integrates three front-ends (LNA, RF-to-IF mixer, VGA) for the cellular, PCS/IMT and GPS frequency bands, a shared I/Q demodulator, IF VCO, and UHF LO buffers. It has 2.0 dB NF and -0.6 dBm IIP3 in the cellular CDMA mode and 2.3 dB NF and -7 dBm IIP3 in the PCS mode with <150 mW at 3 V.

A fully-integrated highly linear zero-IF CMOS cellular CDMA receiver

A 0.25 /spl mu/m highly linear zero-IF CMOS receiver with integrated LNA, downconverter, baseband filter, and VCO supports USA and Japanese CDMA applications. The receiver IC occupies 5.8mm/sup 2/ and draws 56mA at 2.5V.

Single-chip RF CMOS UMTS/EGSM transceiver with integrated receive diversity and GPS

The large commercial success of multiband multimode 3rd-generation cellular products has driven single-chip integration, SAW-filter reduction and low power consumption. State-of-the-art solutions require quad-band EGSM combined with multiband WCDMA/HSPA receiver diversity and integrated GPS. Compact form factors make single-chip SAW-less solutions highly desirable. A Quad-Band GSM/EDGE-only transceiver was published in [1], and Triple-Band WCDMA-only transceiver solutions were published in [2–4]. This work describes the first multiband WCDMA/HSPA/EGPRS single-chip transceiver with GPS and receiver diversity. This device supports UMTS Bands 1,2,3,4,5,6,8,9,10 and GSM/EDGE 800, 900, 1800, 1900MHz Bands. It is implemented in cost-effective 0.18µm RF CMOS technology and uses a reduced number of TX and RX SAW filters.

Direct conversion dual-band SiGe BiCMOS transmitter and receive PLL IC for CDMA/WCDMA/AMPS/GPS applications

A direct conversion 0.4/spl mu/m SiGe BiCMOS transmitter and receiver PLL consists of two transmitters, two PLLs, and an integrated VCO for cellular, PCS/IMT and GPS applications. The chip consumes 71mA at 2.7V with -55dBc ACPR at 885kHz offset and -134dBm/Hz noise at 45MHz offset for cellular, and 79mA, -56dBc ACPR at 1.25MHz offset, and -132dBm/Hz noise at 80MHz offset for PCS.

A cellular-band CDMA 0.25/spl mu/m CMOS LNA linearized using active post-distortion

The theory of a linearization method using active post-distortion (APD) is explained. The method was used in a 0.25/spl mu/m CMOS LNA, designed for cellular band CDMA applications. The LNA achieves 1.2dB NF, 16.2dB power gain, and +8dBm IIP3 while consuming 12mA current from 2.6V supply voltage. It shows 5.7dBm improvement in IIP3 performance with 0.15dB NF penalty in comparison with an LNA which does not use APD.

GaAs RFICs for CDMA/AMPS dual-band wireless transmitters

An upconverter and two driver amplifiers for CDMA/AMPS cellular/PCS wireless transmitters are presented. The upconverter has two selectable RF outputs operating over 800 to 1900 MHz frequency range. They can be assigned to different frequency bands providing a dual-band operation. The driver amplifiers offer two gain modes selected with a control voltage. The cellular driver amplifier provides DC power savings in the low gain mode. The chip set was fabricated using a GaAs 0.6 um E/D MESFET process.

A Low-IF CMOS Simultaneous GPS Receiver Integrated in a Multimode Transceiver

This paper describes a GPS receiver circuit that operates simultaneously with WCDMA/CDMA2000 transceivers. This receiver uses a low-IF architecture to minimize the external passive components. The RF front-end circuit dynamically adjusts the linearity performance based on the instantaneous transmitting power of the integrated transmitter. The receiver measured performances are >80dB gain, 2.0dB noise figure, >20dB image rejection, maximum out-of-band IIP3 is +6dBm. The synthesize features -132dBc/Hz phase noise at 1MHz offset frequency and a total integrated double sideband phase noise of less than -30dBc in the 100Hz to 1MHz band. The receiver is fabricated in a 0.18 mum RFCMOS process, and draws 36.7mA at high linearity mode and 27.4mA at low linearity mode using switch mode power supply.

A Dual-Channel Direct-Conversion CMOS Receiver for Mobile Multimedia Broadcasting

A 0.25mum CMOS receiver circuit that operates from 698MHz to 746MHz, a spectrum allocated by the FCC for advanced mobile services for multimedia applications, is presented. The receiver supports an OFDM physical layer with modulation ranging from BPSK for pilot carriers to 16-QAM for high-rate data carriers. The RX has a NF of 2.6dB and an out-of-band IIP3 of -5.5dBm. It occupies 7mm2 and draws 61mA from a 2.6V supply