Chen Shenggang

Coordinate multi-core DSP YHFT-QMBase: architecture and implementation

Vector-SIMD architecture has attracted considerable interest owing to its high performance in signal processing applications. It is an important trend to combine Vector-SIMD and multi-core technology in the architecture design of high-performance DSPs. However, the performance of current Vector-SIMD architectures is still restricted by the inefficiency of coordinated exploitation among hardware units. This paper proposes a multi-core DSP, YHFT-QMBase, which improves the correlation of traditional multi-core Vector-SIMD architectures from four aspects. (1) The cooperation between scalar and SIMD units is redefined by a dynamic coupling execution scheme. (2) The communication among SIMD lanes is enhanced by a matrix-style communication. (3) Data sharing among vector memory banks is accomplished by an unaligned vector memory accessing scheme. (4) The background coarse-grain data transfer among cores is supported by a Qlink-Crossbar scheme. Experimental results exhibit that YHFT-QMBase can achieve an average performance gain of 58.5%, compared to traditional Vector-SIMD architectures. At peak performance, YHFT-QMBase can achieve 32 GFMACS for single-precision float-point multiply-accumulation, and 128 GMACS for fixed-point (16 bits) multiply-accumulation. The typical power consumption for YHFT-QMBase is 8.65 W.