Chen Weihai

Research on inverter based on Nios II and system design

Variable frequency adjust the speed of the implements by changing the stators voltage and frequency. The characteristics such as energy saving, high efficiency, wide adjusting range, excellent static and dynamic performance make it a high-performance AC speed-adjusting method. In this paper, we have researched the SOPC-based variable frequency speed-adjusting system, including its design principle and application. This paper also has customized an embedded IP core and has replanted the Nios II soft core to a FPGA successfully. Besides, the FPGA-based control circuits and IPM drive circuits, the design of which are proved reliable and correct, are implemented in this paper. Finally, this system has been tested on the experiment platform designed by ourselves. It works stably in the on-load and off-load experiments, which indicates that the original design purpose is achieved.

Study on the key technology of integrated analog chip test and system design

An integrated analog chip tester has been designed. Since we need to test the analog voltage of analog devices, a kernel architecture based on Single Chip Computer(MCU) and AD converter has been designed. In order to solve the possible blight to tester caused by the damaged chips. This paper presents a technology for isolating inside and outside bus, a technology for double power supplies and a technology for power supply protection. The whole design idea of the tester is introduced in detail. AD converter circuit, DA converter circuit, Op amp testing circuit, CW3524 testing circuit and LCD interface circuit have been designed. The procedure of software design is presented, and the primary software modules are explained in detail. Experiment showpiece has been developed. The results of experiments verify the correctness of the design.