Liu Jingmeng

Research on inverter based on Nios II and system design

Variable frequency adjust the speed of the implements by changing the stators voltage and frequency. The characteristics such as energy saving, high efficiency, wide adjusting range, excellent static and dynamic performance make it a high-performance AC speed-adjusting method. In this paper, we have researched the SOPC-based variable frequency speed-adjusting system, including its design principle and application. This paper also has customized an embedded IP core and has replanted the Nios II soft core to a FPGA successfully. Besides, the FPGA-based control circuits and IPM drive circuits, the design of which are proved reliable and correct, are implemented in this paper. Finally, this system has been tested on the experiment platform designed by ourselves. It works stably in the on-load and off-load experiments, which indicates that the original design purpose is achieved.

Adaptive model following speed control method of permanent magnet synchronous motor

Permanent magnet synchronous motor (PMSM) servo system requires a high dynamic performance of speed. The control object of speed loop, which can be described using a two-order transfer function, is the PMSM regulated by current loop. PI controller is generally used in speed control, in which the performance improvement is limited by the strong coupling and nonlinearity of the system. In this paper, an adaptive model following speed controller (AMFC) with state feedback control and model following methods is designed based on the Popov hyperstability theory and modeled in the MATLAB. The simulation results show that, compared with PI control, AMFC raises the speed loop dynamic performance of PMSM by compensating the influence of coupling and nonlinearity, so it is more suitable for servo system.

A new dual-core Permanent Magnet Synchronous Motor Servo System

A new Permanent Magnet Synchronous Motor (PMSM) Servo System is designed based on the dual-core composed of digital signal processor (DSP) and field programmable gate array (FPGA). The dual-core combined of DSP and FPGA achieves the control algorithm by assigning the tasks. The design of external circuit using FPGA simplifies the system structure and enhances the stability. DSP program with multi-interrupt drives the IPM module through pulse-width modulation (PWM) signals. The improved control methods of the three loops of PMSM servo system are achieved in interrupt program: the self-tuning control based on resistance and inductance observer is used in current loop, which ameliorate the following accuracy of current. In order to reduce the response overshoot, the speed is controlled by the integral-separated and limit-weaken PID controller. The feed-forward is added to the proportional position control to reduce the dynamic response error. The application on CNC lathe verifies the feasibility of the design of dual-core system and the control methods of the three loops.

Study on the key technology of integrated analog chip test and system design

An integrated analog chip tester has been designed. Since we need to test the analog voltage of analog devices, a kernel architecture based on Single Chip Computer(MCU) and AD converter has been designed. In order to solve the possible blight to tester caused by the damaged chips. This paper presents a technology for isolating inside and outside bus, a technology for double power supplies and a technology for power supply protection. The whole design idea of the tester is introduced in detail. AD converter circuit, DA converter circuit, Op amp testing circuit, CW3524 testing circuit and LCD interface circuit have been designed. The procedure of software design is presented, and the primary software modules are explained in detail. Experiment showpiece has been developed. The results of experiments verify the correctness of the design.