Cheon-Yong Lim

A high efficiency critical mode boost PFC using a variable inductor

In low-to-mid power applications, a critical conduction mode (CRM) boost power factor corrector (PFC) is widely used due to its simple control and a reduced switching loss. One of the important characteristics of CRM boost PFC is that the switching frequency is not constant and the range of variation is wide. Due to this variability of the switching frequency, there is a design guideline, which must be satisfied. That is, the minimum switching frequency must be higher than the audible frequency. In that reason, a small boost inductance is required to increase the switching frequency. However, this increases the switching loss resulting in a reduced efficiency. In this paper, a new method of improving the efficiency using a variable inductor is proposed. A variable inductor can be implemented by a simple auxiliary circuit. At nominal, where a high efficiency is required, the proposed method operates with a large inductance, which results in the improved efficiency with a decreased switching frequency. On the other hand, when the switching frequency decreases to the audible frequency, the inductance is changed to a smaller value, keeping the frequency higher than the audible frequency over all the range of input line voltage.

A high efficiency half-bridge LLC converter with simple hold-up compensation circuit

The half-bridge (HB) LLC converter has been widely used in medium power applications because of low component count, no transformer dc-offset current, and wide zero-voltage-switching (ZVS) range. However, the HB LLC converter should be designed with small transformer magnetizing inductance to obtain high voltage gain in wide-input-voltage applications with the hold-up time conditions. It causes the HB LLC converter to have large conduction and switch turn-off losses in the primary side at nominal input where a high efficiency is required. To overcome these problems, a simple control method of the HB LLC converter with one additional switch and capacitor in the primary side is proposed in this letter. At nominal input, since the proposed method enables the HB LLC converter to operate with large transformer magnetizing inductance, it can reduce the conduction and switch turn-off losses in the primary side, which makes a high efficiency. On the other hand, during the hold-up time, since the proposed method increases the resonant capacitance by turning on one additional switch, the HB LLC converter can obtain high voltage gain. To confirm the validity of the HB LLC converter with the proposed method, a 325-385V input and 56V/350W output laboratory prototype is built and tested.

A new LLC resonant converter with resonant frequency change for high conversion efficiency and high power density

A LLC resonant converter is a converter, which achieves Buck or Boost gain with Pulse Frequency Modulation, and it is a suitable topology for high power density. This LLC resonant converter has many advantages, such as wide soft-switching range, high switching frequency capability, and low voltage stress of active devices, however, it also has large RMS current and circulating current. From these results, the usage of LLC resonant converter had been limited in low voltage and high current output applications. In this paper, a new LLC resonant converter, which can achieve high conversion efficiency while maintaining high power density, is proposed. Since the proposed converter can be reduced the conduction loss and turn-off loss by large magnetizing inductance, it can achieve higher conversion efficiency than the conventional converter. In addition, in order to regulate the output voltage, the proposed converter changes the resonant frequency using the small size of auxiliary circuit under hold-up time condition. Therefore, the proposed converter is a topology that can satisfy both high conversion efficiency and high power density.

Bode plot and impedance asymptotes for light-load regulation of LLC series resonant converter

In general, the LLC series resonant converter (LLC SRC) is an attractive topology for the applications which require the wide input variation and high efficiency especially at light load condition. This is because of its wide gain capability with pulse-frequency modulation and zero-voltage-switching over the entire load condition. However, there is a regulation problem that the output voltage increases as the output current decreases. In this paper, Bode plot and impedance asymptotes analyses have been conducted to obtain an intuitive sense for the regulation characteristic of LLC SRC under light-load condition. Moreover, in order to improve the regulation characteristic, a new resonant tank with an additional capacitor is proposed and its design guideline is also provided by Bode plot and impedance asymptotes analyses. Therefore, the proposed LLC SRC achieves the very light-load regulation while it can maintain the advantages of typical LLC SRC.

Asymmetric half-bridge resonant converter having a reduced conduction loss for DC/DC power systems with a low input voltage

A new asymmetric half-bridge (HB) resonant converter for DC/DC power system with a low and wide input voltage is proposed in this paper. The proposed converter is based on the switch integration technique, merging the Active-Clamp Forward (ACF) circuit and the HB LLC resonant converter. By adopting the ACF circuit in front of the HB LLC resonant converter, higher input voltage of LLC resonant converter stage can be achieved. As a result, the primary conduction loss can be significantly reduced. In addition, an asymmetric pulse width modulation (APWM) control is applied to cover wide input voltage range and to mitigate the design limitation for a high efficiency and. Consequently, the proposed converter can achieve not only the small conduction loss and the optimal design for high efficiency, but also high power density and low cost due to the switch integration technique. The validity of the proposed converter is confirmed by the experimental results of a prototype converter with 36-72VDC input and 300W (12V/25A) output.

Phase leading input capacitor compensation using variable inductor with high efficiency in a CRM boost PFC

In low-to-mid power supplies, a critical mode (CRM) boost power factor corrector (PFC) converter is a popular topology due to its simple control and no reverse recovery problem. In a CRM boost PFC, the poor power factor due to phase leading input current (PLIC) by input capacitor (Cin) has been pointed out. There has been an effort to compensate PLIC in a CRM boost PFC by digital control. However, digital control is rarely used due to its high cost under 300W application, where the cost is the one of the key factors. In this paper, a new analog control method is proposed to compensate PLIC in a CRM boost PFC. It is achieved by making a lagging current using a variable inductor. The proposed method uses a few components which are very small and cheap. The feasibility of the proposed converter is validated with an 90-264 VRMS input and 390 V/0.5 A output prototype.

A zero-voltage-switching dual boost power factor correction rectifier with active clamp circuit having minimized conduction losses

A zero-voltage-switching (ZVS) bridgeless power factor correction (PFC) boost converter to reduce switching losses is proposed in this paper. Based on the conventional dual boost bridgeless converter, an auxiliary circuit including another main switch on the opposite side is added in the proposed converter to perform ZVS in man switches. Moreover, ZCS of auxiliary switches can also be achieved. As a result, the switching loss can be significantly reduced in the proposed converter. In addition, to minimize the additional conduction loss in the auxiliary circuit, the optimized design method for turn-on time of auxiliary switches is presented. The validity of the proposed converter is confirmed by the experimental results of a prototype converter with 100–240 VAC universal-line input and 800 W (400 V/2 A) output.

Wide-range ZVS asymmetric half-bridge converter with clamping switches for small DC offset current

In this paper, a new wide range zero-voltage switching asymmetric half-bridge (AHB) converter with clamping switches for small DC offset current is proposed. Since the hold-up time requirement makes the conventional AHB converter operates asymmetrically in nominal state, a large DC offset current degrades the performance of AHB converters. In order to overcome this problem, the proposed AHB converter operates symmetrically in nominal state and two clamp switches that replace the clamp diodes, operate in hold-up state for additional gain. From the results, it can reduce the DC offset current of transformer and relieves the drawbacks that caused by asymmetric operation. In addition, a large external inductor of the proposed converter makes the wider zero-voltage switching (ZVS) range. Therefore, the proposed converter achieves the high overall efficiency and the smaller DC offset current than the conventional AHB converter. To verify these advantages of the proposed converter, the experiment was implemented with 340~400V input voltage, 500W (12V/41.67A) output power system at 100 kHz.

Bidirectional bridgeless PFC with reduced input current distortion and switching loss using gate skipping technique

Bidirectional bridgeless PFC is an advantageous topology for high power application among many bridgeless PFCs due to small EMI filter size and no reverse recovery problem. However due to the large junction capacitance of secondary legs diodes, the dead angle is shown in the zero-crossing area. Thus, the input current distortion is intensified, and the unnecessary switching loss decreases the efficiency. In this paper, a simple gate skipping technique is implemented to the zero-crossing area of the bidirectional bridgeless PFC. As a result, the unnecessary switching loss of boost switches and the input current distortion are reduced. The improvement of the proposed method is verified by experimental results with the high line input and 800W(400V/2A) output prototype.

A strategic control scheme of phase-shift full bridge converter for improving light-load efficiency in server power system

The phase-shifted full bridge (PSFB) converter is widely used in the middle and high power applications such as a server power system. However, due to the newly required trend for high light-load efficiency, the PSFB converter has a limitation for light-load efficiency because of a large circulating current, core losses of the transformer and inductors, and the insufficiency ZVS energy of lagging-leg switches. To achieve high light-load efficiency in PSFB converter, the circulating current in the freewheeling mode and the core loss should be reduced. Therefore, this paper proposes the strategic control scheme employing the control scheme of the two-switch forward (TSF) converter. In addition, by applying the additional one gate signal and the expanded dead-time, the switching loss can be significantly reduced. To verify the proposed method, the prototype converter with 750W (12V/62.5A) is built and tested.