Chia-An Yeh
National Taipei University of Technology
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Publication
Featured researches published by Chia-An Yeh.
IEEE Transactions on Industrial Electronics | 2009
Yen-Shin Lai; Chia-An Yeh
The main theme of this paper is to present the digital controller design of a power converter with predictive peak current-mode (PCM) control and leading-edge modulation. The advantages of the control and modulation technique include the reduction of the sampling frequency of the A/D converter, no need of slope compensation, and the provision of a fast dynamic current response. The discrete-time model of the converter is presented as the fundamental to digital controller design and followed by the digital controller design. Moreover, the effect of predictive PCM control with leading edge modulation on limit cycle is analyzed. It is known that the limit cycle can be effectively suppressed as the converter has a predictive PCM control and leading edge modulation. Experimental results will be included to support fully the theoretical analysis.
IEEE Transactions on Power Electronics | 2010
Kung-Min Ho; Chia-An Yeh; Yen-Shin Lai
A novel digital-controlled transition current-mode control technique for interleaved power factor corrector (PFC) is proposed in this paper. For the presented technique, the switching period to retain zero-current switching is predicted rather than sampling the current in real time. Moreover, the related turn-ON period is determined by the voltage controller. Therefore, neither zero-current detection nor high-frequency A/D converter for current sampling is required. Moreover, for interleaved topology with master-slave control, a new ON-time compensation technique is proposed to significantly improve the slave inductor-current distortion, and thereby, achieving current sharing control between phases. Experimental results derived from a DSP-based controller are presented for confirmation. The PFC is with 100 Vac/50 Hz input and 400 Vdc output. The power rating is 460 W. Experimental results show that the power factor is higher than 0.98, efficiency is greater than 96%, and the current sharing can be achieved by the proposed ON-time compensation technique. These results confirm the aforementioned claims very well.
IEEE Transactions on Industrial Informatics | 2012
Yen-Shin Lai; Chia-An Yeh; Kung-Min Ho
One of the advantages of power factor corrector with boundary current mode control is the reduction of reversal recovery loss of diode. This paper proposes a family of predictive methods adapted to digital pulse-width modulations for digital-controlled PFC operated under boundary current mode. The DPWM methods include leading-edge modulation, trailing-edge modulation and triangular modulation. For the proposed control method, the switching period retaining zero current switching is predicted and the turn-on period is determined by the voltage controller. Therefore, neither zero-current detection nor high-frequency A/D converter for current sampling is required for the proposed control method.proposed control method. Experimental results derived from a DSP-based controller are presented for confirmation. The power factor corrector is with 250 W power rating, 100 V/AC/50 Hz input, and 385 V/DC output. Experimental results demonstrate the effectiveness of the proposed predictive digital-controlled PFC under boundary current mode control.
IEEE Transactions on Industrial Electronics | 2012
Chia-An Yeh; Yen-Shin Lai
It has been shown that the resolution of a digital pulsewidth modulator (DPWM) can be dramatically increased by either constant on-time modulation control or constant off-time modulation control as compared to that for constant frequency modulation. However, the switching frequency increases dramatically for the constant on/off-time modulation method under heavy/light load conditions, respectively. The increase of switching frequency results in more switching losses and requires a higher performance controller. The objective of this paper is to propose a new digital pulsewidth modulation (PWM) technique with constant on/off-time control for a synchronous buck dc/dc converter in order to reduce the switching frequency and switching losses. Moreover, the switching frequency can be limited to a certain range. Experimental results of the proposed new digital PWM technique are presented for confirmation. It will be shown that the proposed technique can significantly reduce the switching frequency of the converter, thereby improving DPWM resolution and the efficiency.
energy conversion congress and exposition | 2010
Chia-An Yeh; Kung-Min Ho; Yen-Shin Lai
The main theme of this paper is to present a unified predictive transition current mode control for digital-controlled power factor corrector. The algorithms to achieve transition current control to reduce the reverse recovery loss of PFC are presented. These unified algorithms are derived for various kinds of digital pulse-width modulators including trailing-edge modulation, leading-edge modulation and triangular modulation. The switching period to retain zero current switching is predicted and the turn-on period is determined by the voltage controller. Therefore, zero-current detection is not required for the presented predictive transition current mode control. Experimental results derived from a DSP-based controller are presented for confirmation. The power factor corrector is with 250 W power rating, 100 V/AC/50 Hz input and 385 V/DC output. Experimental results demonstrate the effectiveness of the proposed unified predictive transition current mode control for digital-controlled power factor corrector.
ieee industry applications society annual meeting | 2007
Yen-Shin Lai; Chia-An Yeh; Ye-Then Chang; Ko-Yen Lee
This paper present a novel self-commissioning digital power converter control technique which will significantly reduce the sampling frequency of A/D converter while not requiring slope compensation nor resulting in performance deterioration. The technique includes self-commission of controller and power converter control. In the self-commissioning process, the circuit parameter is identified before start up and then the controller parameters of digital control are calculated automatically according to the identification results and assigned design specifications. Peak current mode control is realized based upon the estimated current using low sampling frequency A/D converter to significantly reducing the cost. Experimental results of an FPGA-based digital power converter are presented. The results show that the voltage ripple is within 3% under both steady and transient conditions.
conference of the industrial electronics society | 2006
Ke-Yen Lee; Chia-An Yeh; Yen-Shin Lai
The objective of this paper is to demonstrate a fully digital controller for non-isolated-point-of-load converter. For fast dynamic slew rate requirement, peak current mode control is preferred in general for providing fast response and over current protection. However, due to the performance limitation of A/D converter and D/A converter, it is implemented by invoking external analog component. In this paper, an FPGA-based digital controller based upon peak current mode control is realized while not invoking any external analog component. Experimental results derived from the realized digital non-isolated-point-of-load converter with slew rate of 200 A/mus will be presented to confirm the design and implementation
international conference on performance engineering | 2007
Ye-Then Chang; Chia-An Yeh; Masahiro Hamaogi; Fumikazu Takahashi; Yen-Shin Lai
This paper presents a novel method to reduce the current ripple caused by the variation of inductor for a DC/DC converter. The presented method is to increase the switching frequency to keep constant current ripple when the inductance changes. Therefore, no extra component is required. The problem will be described first and the related method is presented. An experimental DC/DC converter is implemented which is with input voltage of 12 V, output voltage of 1.5 V, output current of 10 A, and switching frequency of 200-250 kHz. Finally, experimental results derived from the designed digital-controlled DC/DC converter are included for confirmation.
international conference on performance engineering | 2011
Yen-Shin Lai; Zih-Jie Su; Chia-An Yeh; Fumikazu Takahashi; Masahiro Hamaogi
The main theme of this paper is to study the current sensing methods for standby power reduction control of digital-controlled DC/DC converter. These methods include using transformer of full-bridge converter, coupling inductor and ORing MOSFET. The most suitable sensing method was verified with a digital-controlled 500W class DC/DC converter (input/output voltage: 400V/12V). Experimental results derived from digital-controlled DC/DC converter using the TI DSP (TMS320F2812) as the control platform show that current sensed by voltage across ORing MOSFET method provides superb solution. This method offers linear relationship between output voltage of sensing circuit and load current while not causing response delay under standby conditions and thereby truly reflecting accurate standby conditions.
international conference on power electronics and drive systems | 2009
Chia-An Yeh; Yen-Shin Lai
It has been shown that the resolution of DPWM can be dramatically increased by either constant on-time modulation or constant off-time modulation as compared to that for constant frequency modulation. However, the switching frequency increases dramatically for constant on/off-time modulation method under heavy/light load conditions. The objective of this paper is to propose a hybrid control technique with constant on/off-time control for DC/DC converter in order to reduce the switching frequency and switching losses. It will be shown that the proposed technique can significantly reduce the switching frequency of converter and thereby improving the efficiency up to 2%.