Kung-Min Ho

Novel Digital-Controlled Transition Current-Mode Control and Duty Compensation Techniques for Interleaved Power Factor Corrector

A novel digital-controlled transition current-mode control technique for interleaved power factor corrector (PFC) is proposed in this paper. For the presented technique, the switching period to retain zero-current switching is predicted rather than sampling the current in real time. Moreover, the related turn-ON period is determined by the voltage controller. Therefore, neither zero-current detection nor high-frequency A/D converter for current sampling is required. Moreover, for interleaved topology with master-slave control, a new ON-time compensation technique is proposed to significantly improve the slave inductor-current distortion, and thereby, achieving current sharing control between phases. Experimental results derived from a DSP-based controller are presented for confirmation. The PFC is with 100 Vac/50 Hz input and 400 Vdc output. The power rating is 460 W. Experimental results show that the power factor is higher than 0.98, efficiency is greater than 96%, and the current sharing can be achieved by the proposed ON-time compensation technique. These results confirm the aforementioned claims very well.

A Family of Predictive Digital-Controlled PFC Under Boundary Current Mode Control

One of the advantages of power factor corrector with boundary current mode control is the reduction of reversal recovery loss of diode. This paper proposes a family of predictive methods adapted to digital pulse-width modulations for digital-controlled PFC operated under boundary current mode. The DPWM methods include leading-edge modulation, trailing-edge modulation and triangular modulation. For the proposed control method, the switching period retaining zero current switching is predicted and the turn-on period is determined by the voltage controller. Therefore, neither zero-current detection nor high-frequency A/D converter for current sampling is required for the proposed control method.proposed control method. Experimental results derived from a DSP-based controller are presented for confirmation. The power factor corrector is with 250 W power rating, 100 V/AC/50 Hz input, and 385 V/DC output. Experimental results demonstrate the effectiveness of the proposed predictive digital-controlled PFC under boundary current mode control.

Bandwidth-based analysis and controller design of power factor corrector for universal applications

The purpose of this paper is to analyze and design the controllers of power factor corrector for universal applications. And present its implementation using field programmable gate array. For the controller design, the bandwidth of voltage loop as the input voltage changes for PFC with and without input voltage feedforward will be analyzed. It will be shown that for the PFC without input voltage feedforward, the bandwidth of voltage loop varies as the input voltage changes. And the bandwidth of voltage loop for low line input is significantly reduced as it is designed based upon the high line input model. In contrast, the bandwidth of voltage loop of PFC for high line input is increased as it is designed based upon the low line input model. For the PFC with feedforward input voltage, the bandwidth of voltage loop retains constant for both low line and high line inputs and therefore no additional gains are required for universal input applications. This analysis provides a guideline for the design of PFC for universal input applications. Moreover, to fully take the advantages of digital control, an FPGA is used for the realization of digital-controlled PFC for universal input applications. Experimental results derived from an FPGA-based digital-controlled universal PFC are presented to fully support the presented PFC.

An unified approach to predictive transition current mode control for digital-controlled power factor corrector

The main theme of this paper is to present a unified predictive transition current mode control for digital-controlled power factor corrector. The algorithms to achieve transition current control to reduce the reverse recovery loss of PFC are presented. These unified algorithms are derived for various kinds of digital pulse-width modulators including trailing-edge modulation, leading-edge modulation and triangular modulation. The switching period to retain zero current switching is predicted and the turn-on period is determined by the voltage controller. Therefore, zero-current detection is not required for the presented predictive transition current mode control. Experimental results derived from a DSP-based controller are presented for confirmation. The power factor corrector is with 250 W power rating, 100 V/AC/50 Hz input and 385 V/DC output. Experimental results demonstrate the effectiveness of the proposed unified predictive transition current mode control for digital-controlled power factor corrector.

Novel Online Parameter Tuning Method for Digital Boost PFC With Transition Current Mode

A new online parameter tuning method for digital power factor corrector (PFC) with transition current mode (TCM) control is proposed in this paper. The proposed method copes with the parameter variation issue, which results in discontinuous current mode operation and larger current ripple. The proposed method is to give one more current sample in one sampling period in order to estimate the inductance of a boost inductor online, thereby tuning the parameter of the predicted switching period. It will be shown by experimental results that the proposed online parameter tuning method can retain TCM operation even under full-load condition and slightly increase the converter efficiency. Experimental results derived from a digital-signal-processor-based controller are presented for confirmation. The PFC is with 270-W power rating, 100-V/50-Hz input, and 385-V/dc output. Experimental results demonstrate the effectiveness of the proposed online parameter tuning method for digital PFC under TCM control.

Digital-controlled power factor corrector with transition current mode control without zero current detection

It is well known that transition current mode control for power factor corrector can reduce the reversal recovery loss for the diode. This method can be realized using discrete control integrated circuit which requires zero-crossing detection circuit. In this paper, a novel control technique for digital-controlled power factor corrector to achieve transition current mode control is proposed. The switching period to retain zero current switching is predicted and the turn-on period is determined by the voltage controller. Experimental results derived from a DSP-based controller are presented for confirmation. The power factor corrector is with 100 V/AC input and 400 V/DC output. Its power rating is 250 W. Experimental results show that the power factor is higher than 0.98, efficiency is greater than 94% and current total harmonics distortion (THDi) is smaller than 4% under full load condition and confirms the above-mentioned claims very well.

Novel on-line parameter tuning method for digital-controlled boost PFC with transition current mode

A new on-line parameter tuning method for digital-controlled PFC with transition current mode control is proposed in this paper. The proposed method copes with the parameter variation issue which results in discontinuous current mode operation and larger current ripple. The proposed method is to give one more current sample in one sampling period in order to estimate the inductance of boost inductor on line and thereby tuning the parameter of controller. It will be shown by experimental results that the proposed on-line parameter tuning method can retain transition current mode operation even under full load condition and slightly increase the converter efficiency.

FPGA-based digital-controlled power converter with universal input meeting 80 Plus platinum efficiency code and standby power code for sever power applications

This paper contributes to the presentation of control technique for digital-controlled power converter meeting platinum efficiency code and standby power code for sever power applications. Two control modes are presented in this paper in order to achieve standby power code. A control method to achieve constant bandwidth for power factor stage despite of input voltage variation, changing from 90V/AC to 264V/AC. Controller design and loss analysis of converter in order to achieve platinum efficiency code is included. Experimental results derived from an FPGA-based digital-controlled power converter for sever power are presented. It will be shown that the standby power is less than 0.5W and light load efficiency is improved to go up to more than 90% for both low line and high line input voltage. Moreover, it will be confirmed that the platinum efficiency code can be met under 20%, 50% and 100% load conditions. The efficiency is 91.60 %, 93.17 % and 89.66 % for low line input, respectively. The efficiency is 93.09 %, 94.51 % and 91.64 % for high line input, respectively. These results fully support the claims and contributions of this paper.

Novel random switching PWM with constant sampling frequency and constant inductor average current for digital-controlled power factor corrector

The objective of this paper is to present a random switching method which changes switching frequency while retaining constant sampling frequency. The proposed method can effectively reduce magnitude of PWM harmonics. Experimental results derived from an FPGA-based controller are presented for confirmation. The power factor corrector is with 400 W power rating, 90 V/AC/60 Hz input and 385 V/DC output. Experimental results demonstrate the effectiveness of the proposed random switching technique.