Chia-Han Yang

Charge detrapping and dielectric breakdown of nanocrystalline zinc oxide embedded zirconium-doped hafnium oxide high-k dielectrics for nonvolatile memories

Charge detrapping and dielectric breakdown phenomena of the nanocrystalline zinc oxide embedded zirconium-doped hafnium oxide high-k dielectric have been investigated. Charges were loosely or strongly retained at the nanocrystal sites which were saturated above a certain stress voltage. From the polarity change of the relaxation current, it was confirmed that the high-k part of the dielectric film was broken under a high gate bias voltage condition while the nanocrystals still retained charges. These charges were gradually released. These unique characteristics are important to the performance and reliability of the memory device.

Non-parametric Bayesian modeling of hazard rate with a change point for nanoelectronic devices

This study proposes a non-parametric Bayesian approach to the inference of the L-shaped hazard rate with a change point, which has been observed for nanoelectronic devices in experimental studies. Instead of assuming a restrictive parametric model for the hazard rate function, this article uses a flexible non-parametric model based on a stochastic jump process to describe the decreasing hazard rate in the infant mortality period. A Markov chain Monte Carlo simulation algorithm that implements a dynamic version of the Gibbs sampler is developed for posterior simulation and inference. The proposed approach is applied to analyze an experimental data set, which consists of the failure times of a novel nanoelectronic device: a metal oxide semiconductor capacitor with mixed oxide high-k gate dielectric. Results obtained from the analysis demonstrate that the proposed non-parametric Bayesian approach is capable of producing reasonable estimates of the hazard rate function and the change point. As a flexible method, the proposed approach has the potential to be applied to assess the reliability of novel nanoelectronic devices when the failure mechanisms are generally unknown, parametric reliability models are not readily available, and the availability of data is limited.

Failure analysis of nanocrystals embedded high-k dielectrics for nonvolatile memories

Semiconducting and metallic nanocrystals have been embedded in high-k dielectrics for nonvolatile memories for advantages of low leakage currents, large charge storage capacities, and long retention times. However, there are few studies on the reliability issues, such as the breakdown mechanism and relaxation current decay rate. In this paper, authors investigated the reliability of four different kinds of nanocrystals, i.e., ruthenium, indium tin oxide, silicon, and zinc oxide, embedded in the Zr-doped HfO2 high-k thin film. Although all nanocrystals embedded samples have charge storage capacity about one order of magnitude higher than that without nanocrystals embedded samples, the formerpsilas relaxation currents are higher and decay times are longer than those of the latter. When the relaxation currents were fitted to the Curie-von Schweidler law, the formerpsilas n values were between 0.4 and 0.65, which are different from the latterpsilas n values of near 1. When the naocrystals embedded sample was broken under a high bias gate voltage stress, the high-k part failed while the nanocrystals remained unattacked. This is demonstrated by the lack of polarity change of the relaxation current. The time to breakdown of the high-k film was also extended due to the inclusion of nanocrystals in the film. Therefore, the embedded nanocrystals play an important role for the reliability of this kind of nonvolatile memory device.

Temperature Influence on Nanocrystals Embedded High-k Nonvolatile Memory Characteristics

The temperature influence on memory functions of the nanocrystalline ZnO embedded Zr-doped HfO2 high-k capacitor was investigated. Both the memory window and the trapped charge density increased with the increase of temperature. The temperature effect on hole trapping was observed at 125aC but not at 25aC or 75aC. The temperature effect on electron trapping was obvious above 25aC. The interface quality is greatly influenced by the temperature, which was detected on the C-V, G-V, and I-V curves. The sample temperature affects the carrier generation and transport mechanisms, which are responsible for the memory function changes.