Chien Hsiung Hung

Improving source/drain contact resistance of amorphous indium–gallium–zinc-oxide thin-film transistors using an n+-ZnO buffer layer

To avoid high temperature annealing in improving the source/drain (S/D) resistance (R DS) of amorphous indium–gallium–zinc-oxide (α-IGZO) thin-film transistors (TFTs) for flexible electronics, a simple and efficient technique using a sputtering-deposited n+-ZnO buffer layer (BL) sandwiched between the S/D electrode and the α-IGZO channel is proposed and demonstrated. It shows that the R DS of α-IGZO TFTs with the proposed n+-ZnO BL is reduced to 8.1 × 103 Ω as compared with 6.1 × 104 Ω of the conventional one. The facilitation of carrier tunneling between the S/D electrode and the α-IGZO channel through the use of the n+-ZnO BL to lower the effective barrier height therein is responsible for the R DS reduction. Effects of the chamber pressure on the carrier concentration of the sputtering-deposited n+-ZnO BL and the thickness of the BL on the degree of improvement in the performance of α-IGZO TFTs are analyzed and discussed.

Hydrothermal Growth of Quasi-Monocrystal ZnO Thin Films and Their Application in Ultraviolet Photodetectors

Quasi-monocrystal ZnO film grown using the hydrothermal growth method is used for the fabrication of Cu2O/ZnO heterojunction (HJ) ultraviolet photodetectors (UV-PDs). The HJ was formed via the sputtering deposition of p-type Cu2O onto hydrothermally grown ZnO film (HTG-ZnO-film). The effect of annealing temperature in the nitrogen ambient on the photoluminescence spectra of the synthesized ZnO film was studied. The optoelectronic properties of Cu2O/ZnO film with various Cu2O thicknesses (250–750 nm) under UV light (365 nm; intensity: 3 mW/cm2) were determined. The UV sensitivity of the HTG-ZnO-film-based UV-PDs and the sputtered ZnO-film-based UV-PDs were 55.6-fold () and 8.8-fold (), respectively. The significant gain in sensitivity ( = 630%) of the proposed ZnO-film-based device compared to that for the device based on sputtered film can be attributed to the improved photoelectric properties of quasi-monocrystal ZnO film.

Enhanced light output of vertical GaN-based LEDs with surface roughened by refractive-index-matched Si3N4/GaN nanowire arrays

A surface roughening scheme with Si3N4-coated GaN nanowire (NW) arrays is proposed to improve the light extraction efficiency of GaN-based vertical light-emitting diodes (VLEDs). The scheme allows a graded refractive index that varies from 2.5 (GaN) to 1.9–2.0 (Si3N4) to 1 (air). Experimental results show that the use of 0.8-µm-long GaN NW arrays coated with a 250-nm-thick Si3N4 film enhances the light output power by 28.7% at 350 mA compared with that of regular VLEDs with a KOH-roughened surface. This enhancement is attributed to the Si3N4/GaN NW arrays effectively releasing total internal reflection and minimizing Fresnel loss.

Improving Crystalline Silicon Solar Cell Efficiency Using Graded-Refractive-Index SiON/ZnO Nanostructures

The fabrication of silicon oxynitride (SiON)/ZnO nanotube (NT) arrays and their application in improving the energy conversion efficiency (η) of crystalline Si-based solar cells (SCs) are reported. The SiON/ZnO NT arrays have a graded-refractive-index that varies from 3.5 (Si) to (Si3N4 and ZnO) to (SiON) to 1 (air). Experimental results show that the use of 0.4 μm long ZnO NT arrays coated with a 150 nm thick SiON film increases by 39.2% under AM 1.5 G (100 mW/cm2) illumination as compared to that of regular SCs with a Si3N4/micropyramid surface. This enhancement can be attributed to SiON/ZnO NT arrays effectively releasing surface reflection and minimizing Fresnel loss.

A room temperature process for the fabrication of amorphous indium gallium zinc oxide thin-film transistors with co-sputtered Zr x Si1− x O2 Gate dielectric and improved electrical and hysteresis performance

The use of co-sputtered zirconium silicon oxide (Zr x Si1− x O2) gate dielectrics to improve the gate controllability of amorphous indium gallium zinc oxide (α-IGZO) thin-film transistors (TFTs) through a room-temperature fabrication process is proposed and demonstrated. With the sputtering power of the SiO2 target in the range of 0–150 W and with that of the ZrO2 target kept at 100 W, a dielectric constant ranging from approximately 28.1 to 7.8 is obtained. The poly-structure formation immunity of the Zr x Si1− x O2 dielectrics, reduction of the interface trap density suppression, and gate leakage current are examined. Our experimental results reveal that the Zr0.85Si0.15O2 gate dielectric can lead to significantly improved TFT subthreshold swing performance (103 mV/dec) and field effect mobility (33.76 cm2 V−1 s−1).

Using co-sputtered ZrSiO x gate dielectrics to improve mobility and subthreshold swing of amorphous IGZO thin-film transistors

In recent years, amorphous indium-gallium-zinc-oxide (α-IGZO) thin-film transistors (TFTs) with much better performance compared with the low-temperature polysilicon (LTPS) counterpart have been demonstrated [1-2], nevertheless, continuous efforts are still urged to further polish its electrical properties for display application. To strengthen field effect and reduce gate leakage current, many research works have been focused on the feasibility of other alternative high-κ dielectric for α-IGZO TFTs [3]. In the present work, the use of co-sputtered zirconium silicon oxide (ZrSiO_x) gate dielectrics to improve both mobility and subthreshold swing (SS) of α-IGZO TFT is proposed and demonstrated. The ZrSiO_x dielectric is expected to have a good compromise between the field effect (κ-value) and gate leakage current, because silicon dioxide (SiO₂) is with the widest bandgap and zirconium dioxide (ZrO₂) could have a much better interface with α-IGZO in comparison with hafnium dioxide (HfO₂) [4]. The suitable RF power ratio for the co-sputtering of ZrO₂ and SiO₂ targets at room temperature to maximize the role of ZrSiO_x dielectrics is investigated. Immunity of poly-structure formation of the ZrSiO_x dielectrics with RF power ratio (ZrO₂:SiO₂) > 2 found in experiments is examined. In addition, effect of post annealing after dielectric deposition (PA) on device performance are also studied.

Ultraviolet light emitting diodes based on hydrothermal grown crystalline n-ZnO on p-GaN film

The growth of single crystalline ZnO film on p-GaN using the hydrothermal method is proposed and its application on n-ZnO/p-GaN heterojunction light emitting diodes (HJ-LED) is demonstrated. The effect of thermal annealing in the nitrogen ambient on the optical and electrical properties of hydrothermally grown ZnO film (HTG-ZnO film) onto a p-GaN substrate is investigated. The current-voltage (I-V) curves in darkness show that the prepared n-HTG-ZnO film/p-GaN HJ with thermal annealing has good rectifying characteristics and a 150% improvement in leakage current at -4 V has been achieved for the n-ZnO/p-GaN with thermal annealing. Strong ultraviolet lights emission from the annealed n-ZnO/p-GaN HJ-LED at around 375 nm without defect-related emissions in the visible region are observed from electroluminescence (EL) spectra.

Enhanced light output of GaN-based thin-film flip-chip light-emitting diodes by surface texturing using laser ablation and chemical etching

A surface texturing scheme using ablation etching by KrF excimer laser irradiation and chemical wet etching is demonstrated to improve the light-extraction efficiency of GaN-based thin-film flip-chip light-emitting diodes (TFFC-LED). Both simulated and experimental results on the light emission characteristics are presented and discussed. For the TFFC-LED (die size of 1×1 mm2) with the proposed surface roughening scheme, enhancements in light output power (LOP) by 13.08% (12.81%) and wall-plug efficiency (WPE) by 2.87% (2.25%) at 350 mA (700 mA) as compared with that of the TFFC-LED without surface texturing are achieved experimentally.