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Dive into the research topics where Chien-Ying Wu is active.

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Featured researches published by Chien-Ying Wu.


IEEE Electron Device Letters | 2010

RF Performance Improvement of Metamorphic High-Electron Mobility Transistor Using (In(x)Ga(1-x)As)(m)/(InAs)(n) Superlattice-Channel Structure for Millimeter-Wave Applications

Chien-I Kuo; Heng-Tung Hsu; Yu-Lin Chen; Chien-Ying Wu; Edward Yi Chang; Yasuyuki Miyamoto; Wen-Chung Tsern; Kartik Chandra Sahoo

High-performance metamorphic high-electron mobility transistors (MHEMTs) using an (In<sub>x</sub>Ga<sub>1-x</sub>As)<sub>m</sub>/(InAs)<sub>n</sub> superlattice structure as a channel layer have been fabricated successfully. These HEMTs with 80-nm gate length exhibited a high drain current density of 392 mA/mm and a transconductance of 991 mS/mm at 1.2-V drain bias. Compared with a regular In_xGa_1 - xAs channel, the superlattice-channel HEMTs showed an outstanding performance due to the high electron mobility and better carrier confinement in the (In<sub>x</sub>Ga<sub>1-x</sub>As)<sub>m</sub>/(InAs)<sub>n</sub> channel layer. When biased at 1.2 V, the current gain cutoff frequency (f<sub>T</sub>) and the maximum oscillation frequency (f<sub>max</sub>) were extracted to be 304 and 162 GHz, respectively. As for noise performance, the device demonstrated a 0.75-dB minimum noise figure (NF<sub>min</sub>) with an associated gain of 9.6 dB at 16 GHz. Such superior performance has made the devices with a superlattice channel well suitable for millimeter-wave applications.


international symposium on power semiconductor devices and ic s | 2016

Optimization of gate insulator material for GaN MIS-HEMT

Yueh-Chin Lin; T. W. Lin; Chien-Ying Wu; H. T. Hsu; Wang-Cheng Shih; Kuniyuki Kakushima; Kazuo Tsutsui; H. Iwai; Edward Yi Chang

Metal-insulator-semiconductor (M-I-S) structure has been employed for GaN HEMTs to suppress gate leakage current. In this work, various gate insulator materials including SiO<sub>2</sub>, HfO<sub>2</sub>, La<sub>2</sub>O<sub>3</sub>, HfO<sub>2</sub>/SiO<sub>2</sub> and La<sub>2</sub>O<sub>3</sub>/SiO<sub>2</sub> were investigated for GaN MIS-HEMT application. It is found that GaN MIS-HEMT with La<sub>2</sub>O<sub>3</sub>/SiO<sub>2</sub> composite oxide results in better device performance and reliability as compared to other gate insulator materials.


asia-pacific microwave conference | 2008

Evaluation of RF and logic performance for 40 nm InAs/InGaAs composite channel HEMTs for high-speed and low-voltage applications

Chien-Ying Wu; Heng-Tung Hsu; Chien-I Kuo; E. Yi Chang; Yu-Lin Chen

The DC and RF performances of 40 nm high electron mobility transistors (HEMTs) with composite channel of InAs channel and In<sub>0.53</sub>Ga<sub>0.47</sub>As sub-channel were demonstrated. The drain current was 870 mA/mm (V<sub>ds</sub>=0.4V, V<sub>gs</sub>=0V) and maximum g<sub>m</sub> was 1750 mS/mm (V<sub>ds</sub>=0.5V, V<sub>gs</sub>=-0.65V). The devices showed high current gain cutoff frequency (f<sub>T</sub>) of 420 GHz and low gate delay time of 0.77 ps owing to the nanometer gate length and extremely high electron mobility of the InAs channel. Under low DC power consumption; these InAs HEMTs still exhibited excellent RF and logic performance which indicates these devices have great potential for future high-speed and low-voltage applications.


international conference on indium phosphide and related materials | 2016

Evaluation of GaN HEMT with field plate for reliability improvement

Yueh-Chin Lin; Jenshan Lin; Yueh Chin Lin; Chien-Ying Wu; Ping-Chieh Chin; Hisang-Hua Hsu; Tsung-Eong Hsieh; Hiroshi Iwai; Edward Yi Chang

Summary form only given. The GaN HEMT power device with field plate for device reliability improvement is investigated. Overall, the field plate structure smooths the electrical field distribution in the HEMT structure and reduces the generation of defects and the interface traps in the device, resulting in higher device breakdown voltage, lower leakage current, and less current degradation with steady dynamic on-resistance after high voltage stress.


international conference on enabling science and nanotechnology | 2010

Logic performance of 40 nm InAs/In x Ga 1−x As composite channel HEMTs

Faiz Aizad; Heng-Tung Hsu; Chien-I Kuo; Li-Han Hsu; Chien-Ying Wu; Edward Yi; Guo-Wei Huang; Szu-Ping Tsai

Current Si-CMOS technology has come to a limit that novel semiconductors as alternative channel materials (Ge, InSb, InxGa1−xAs) are urgently needed for high-speed and low-power logic devices for post CMOS era [1]. Recent research shows III–V heterostructure field-effect transistors demonstrate aggressive merits due to its high electron mobility and rather mature process technology [2]. The outstanding low field electron transport characteristics of III–V materials make ultrahigh-speed switching at very low supply voltage possible [3]. Here, we present the latest advancement of 40 nm InAs/InxGa1−xAs composite channel High Electron Mobility Transistor (HEMT) devices that have achieved excellent digital logic characteristics at very low power level.


Japanese Journal of Applied Physics | 2010

DC and RF Performance Improvement of 70 nm Quantum Well Field Effect Transistor by Narrowing Source–Drain Spacing Technology

Chien-I Kuo; Heng-Tung Hsu; Edward Yi Chang; Yasuyuki Miyamoto; Chien-Ying Wu; Yu-Lin Chen; Yu-Lin Hsiao

A 70 nm InAs channel quantum well field effect transistor (QWFET) fabricated by a narrowing source–drain (S/D) spacing technique was realized for future high-speed and logic applications. The S/D spacing was decreased from 3 to 0.65 µm through a simple fabrication process, which is an ameliorative redeposition ohmic technique. The drain-source current density and transconductance of the device were increased from 391 to 517 mA/mm and from 946 to 1348 mS/mm after the scaling of the S/D spacing, respectively. In addition, the current gain cutoff frequency ( fT) was also increased from 185 to 205 GHz. These results show that the easy method can effectively improve the III–V QWFET device performance for high-frequency and high-speed applications.


IEEE Electron Device Letters | 2010

RF Performance Improvement of Metamorphic High-Electron Mobility Transistor Using

Chien-I Kuo; Heng-Tung Hsu; Yu-Lin Chen; Chien-Ying Wu; Edward Yi Chang; Yasuyuki Miyamoto; Wen-Chung Tsern; Kartik Chandra Sahoo

High-performance metamorphic high-electron mobility transistors (MHEMTs) using an (In<sub>x</sub>Ga<sub>1-x</sub>As)<sub>m</sub>/(InAs)<sub>n</sub> superlattice structure as a channel layer have been fabricated successfully. These HEMTs with 80-nm gate length exhibited a high drain current density of 392 mA/mm and a transconductance of 991 mS/mm at 1.2-V drain bias. Compared with a regular In_xGa_1 - xAs channel, the superlattice-channel HEMTs showed an outstanding performance due to the high electron mobility and better carrier confinement in the (In<sub>x</sub>Ga<sub>1-x</sub>As)<sub>m</sub>/(InAs)<sub>n</sub> channel layer. When biased at 1.2 V, the current gain cutoff frequency (f<sub>T</sub>) and the maximum oscillation frequency (f<sub>max</sub>) were extracted to be 304 and 162 GHz, respectively. As for noise performance, the device demonstrated a 0.75-dB minimum noise figure (NF<sub>min</sub>) with an associated gain of 9.6 dB at 16 GHz. Such superior performance has made the devices with a superlattice channel well suitable for millimeter-wave applications.


international conference on indium phosphide and related materials | 2009

(\hbox{In}_{x}\hbox{Ga}_{1 - x}\hbox{As})_{m}/(\hbox{InAs})_{n}

Chien-I Kuo; Heng-Tung Hsu; Chien-Ying Wu; Edward Yi Chang; Yasuyuki Miyamoto; Yu-Lin Chen; Dhrubes Biswas

A 40-nm T-gate high-electron-mobility-transistor with InAs/In<inf>0.7</inf>Ga<inf>0.3</inf>As composite-channel has been fabricated. The device exhibits a transconductance (g<inf>m</inf>) of 2200 mS/mm, a cutoff frequency f<inf>T</inf> of 506 GHz and a minimum noise figure of 1.21 dB at a frequency of 58 GHz. These performances make the device well-suited for millimeter-wave or sub-millimeter-wave applications.


asia-pacific microwave conference | 2009

Superlattice-Channel Structure for Millimeter-Wave Applications

Chien-I Kuo; Heng-Tung Hsu; Jung-Chi Lu; Edward Yi Chang; Chien-Ying Wu; Yasuyuki Miyamoto; Wen-Chung Tsern

High performance MHEMTs using (In<inf>x</inf>Ga<inf>1-x</inf>As)<inf>m</inf>/(InAs)<inf>n</inf> superlattice structure as a channel layer have been fabricated successfully. These HEMTs with 80 nm gate length exhibit high drain current density of 392 mA/mm at drain bias 1.0 V and transconductance of 991 mS/mm at drain bias 1.2 V. Comparison with regular In<inf>x</inf>Ga<inf>1-x</inf>As channel, the superlattice channel HEMTs show an outstanding performance because of high electron mobility, and better carrier confinement in the (In<inf>x</inf>Ga<inf>1-x</inf>As)<inf>m</inf>/(InAs)<inf>n</inf> channel layer. The current gain cutoff frequency (f<inf>T</inf>) and maximum oscillation frequency (f<inf>max</inf>) were extracted to be 304 GHz and 162 GHz, respectively. The device demonstrated a 0.75 dB noise figure with an associated gain 9.6 dB at 16 GHz. The excellent device performance shows that the superlattice channel can be practically used for high-frequency and millimeter-wave application.


Microelectronic Engineering | 2010

A 40-nm-Gate InAs/In 0.7 Ga 0.3 As Composite-Channel HEMT with 2200 mS/mm and 500-GHz f T

Chien-I Kuo; Heng-Tung Hsu; Chien-Ying Wu; Edward Y. Chang; Yu-Lin Chen; Wee-Chin Lim

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Chien-I Kuo

National Chiao Tung University

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Heng-Tung Hsu

National Chiao Tung University

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Edward Yi Chang

National Chiao Tung University

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Yu-Lin Chen

National Chiao Tung University

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Yasuyuki Miyamoto

Tokyo Institute of Technology

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Wen-Chung Tsern

National Chiao Tung University

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Edward Y. Chang

National Chiao Tung University

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Kartik Chandra Sahoo

National Chiao Tung University

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Yueh-Chin Lin

National Chiao Tung University

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Dhrubes Biswas

Indian Institute of Technology Kharagpur

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