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Dive into the research topics where Chiharu Ota is active.

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Featured researches published by Chiharu Ota.


IEEE Transactions on Electron Devices | 2008

Ultralow-Loss SiC Floating Junction Schottky Barrier Diodes (Super-SBDs)

Johji Nishio; Chiharu Ota; Tetsuo Hatakeyama; Takashi Shinohe; Kazutoshi Kojima; Shin Ichi Nishizawa; Hiromichi Ohashi

We have applied the floating junction (FJ) structure, which has been confirmed to be effective in reducing the on-resistance of Si power devices, to SiC FJ Schottky barrier diodes (SiC Super-SBDs). Optimization of the device parameters, which are derived by making improvements in the device simulator, and development of the fabrication process have enabled realization of Super-SBDs with a breakdown voltage of 2700 V and a specific on-resistance of 2.57 mOmega ldr cm2. These values correspond to the world record of 11.3 GW/cm2 for Baligas figure-of-merit (BFOM = 4Vbd 2/Ron-sp).


Materials Science Forum | 2013

Development of High-Voltage 4H-SiC PiN Diodes on 4° and 8° Off-Axis Substrates

Dai Okamoto; Yasunori Tanaka; Norio Matsumoto; Makoto Mizukami; Chiharu Ota; Kazuto Takao; Kenji Fukuda; Hajime Okumura

13-kV 4H-SiC PiN diodes were fabricated on 4° and 8° off-axis substrates and their electrical properties were examined. Small test PiN diodes with various JTE concentrations were fabricated and the dependence of JTE concentration was examined. The highest breakdown voltages were 14.6 and 14.1 kV at a JTE1 concentration of 1.9 × 1017 cm−3 for both the 4° and 8° off-axis substrates. Based on the results, 4 mm × 4 mm SiC PiN diodes were successfully fabricated and exhibited avalanche breakdown voltages of 14.0 and 13.5 kV for the 4° and 8° off-axis substrates, respectively. Forward voltage degradation was larger for the 8° off-axis substrates.


applied power electronics conference | 2009

Design Consideration of High Power Density Inverter with Low-on-voltage SiC-JBS and High-speed Gate Driving of Si-IGBT

Kazuto Takao; Chiharu Ota; Johji Nishio; Takashi Shinohe; Hiromichi Ohashi

Design consideration of a three-phase inverter with 1200 V Si-IGBT and SiC-JBS hybrid pairs has been implemented to further reduce the power loss and increase the power density. A low-on-voltage SiC-JBS has been developed to reduce the conduction loss. In order to minimize the switching loss of Si-IGBT, a high-speed gate driving technique is introduced. A 4 kVA class three-phase hybrid pair inverter is fabricated to demonstrate the improvements in the power loss and efficiency. The power density of the hybrid pair inverter is estimated based on the power loss data.


Materials Science Forum | 2006

Fabrication of 4H-SiC Floating Junction Schottky Barrier Diodes (Super-SBDs) and their Electrical Properties

Chiharu Ota; Johji Nishio; Tetsuo Hatakeyama; Takashi Shinohe; Kazutoshi Kojima; Shin Ichi Nishizawa; Hiromichi Ohashi

4H-SiC floating junction Schottky barrier diodes (Super-SBDs) were fabricated. It was found that their properties are closest to the theoretical limitation, defined by the relationship between specific on-state resistance and breakdown voltage of 4H SiC-unipolar devices. They have a p-type floating layer designed as line-and-spacing. The specific on-state resistances of Super-SBDs with a few micrometers of spacing width were found to be nearly equal to those of conventional SBDs without p-type floating layer. The breakdown voltages of Super-SBDs were higher than those of conventional SBDs. Accordingly the properties of Super-SBDs have improved the trade-off between specific on-state resistance and breakdown voltage, and the highest value to date for Baliga’s Figure of Merit (BFOM) has been obtained.


Materials Science Forum | 2007

Simulation, fabrication and characterization of 4H-SiC floating junction schottky barrier diodes (super-SBDs)

Chiharu Ota; Johji Nishio; Tetsuo Hatakeyama; Takashi Shinohe; Kazutoshi Kojima; Shin Ichi Nishizawa; Hiromichi Ohashi

The calculation for 4H-SiC floating junction Schottky barrier diodes (Super-SBDs) was carried out by device simulation and the optimized device structure was fabricated. The best characteristics of the Super-SBDs were breakdown voltage of 2700V and the specific on-resistance of 2.57m*cm2. The world record of Bariga’s Figure of Merit (BFOM) for SiC-SBD expressed by 4Vbd 2/Ron was improved to 11,354MW/cm2.


Materials Science Forum | 2014

13-kV, 20-A 4H-SiC PiN Diodes for Power System Applications

Dai Okamoto; Yasunori Tanaka; Tomonori Mizushima; Mitsuru Yoshikawa; Hiroyuki Fujisawa; Kensuke Takenaka; Shinsuke Harada; Shuji Ogata; Toshihiko Hayashi; Toru Izumi; Tetsuro Hemmi; Atsushi Tanaka; Koji Nakayama; Katsunori Asano; Kazushi Matsumoto; Naoyuki Ohse; Mina Ryo; Chiharu Ota; Kazuto Takao; Makoto Mizukami; Tomohisa Kato; Manabu Takei; Yoshiyuki Yonezawa; Kenji Fukuda; Hajime Okumura

We successfully fabricated 13-kV, 20-A, 8 mm × 8 mm, drift-free 4H-SiC PiN diodes. The fabricated diodes exhibited breakdown voltages that exceeded 13 kV, a forward voltage drop of 4.9–5.3 V, and an on-resistance (RonAactive) of 12 mW·cm2. The blocking yield at 10 kV on a 3-in wafer exceeded 90%. We investigated failed devices using Candela defect maps and light-emission images and found that a few devices failed because of large defects on the chip. We also demonstrated that the fabricated diodes can be used in conducting high-voltage and high-current switching tests.


Materials Science Forum | 2005

Epitaxial Overgrowth of 4H-SiC for Devices with p-Buried Floating Junction Structure

Johji Nishio; Chiharu Ota; Takashi Shinohe; Kazutoshi Kojima; Hajime Okumura

The epitaxial overgrowth process was examined with a view to realizing the p-buried floating junction structure. The growth condition was investigated to reduce the p-type impurity contamination and to minimize the auto-doping. Total p-type impurity concentration was reduced to 1/50 of the n-type carrier concentration of the drift layers. The buried p-type floating structure was realized for the first time, using 4H-SiC material.


energy conversion congress and exposition | 2013

Maximum switching frequency characterization of 4.5kV–400A SiC-PiN diode and Si-IEGT hybrid pair power module

Kazuto Takao; Keiji Wada; Kyungmin Sung; Yuji Mastuoka; Yasunori Tanaka; Shin Ichi Nishizawa; Chiharu Ota; Takeo Kanai; Takashi Shinohe; Hiromichi Ohashi

The maximum switching frequency of a 4.5 kV-400 A SiC-PiN diode and Si-IEGT hybrid pair module has been analyzed from the viewpoints of cooling capacity of the hybrid pair module and the minimum pulse width of the PWM signal. In the developed hybrid pair module, a direct water cooling type heat sink is employed to enhance the cooling capacity. It found that the developed 4.5 kV-400 A hybrid pair module could be operate at 10 kHz PWM switching frequency with the peak current of 110 A and the dc voltage of 2.5 kV. In this operating condition, the power losses of the Si-IEGT and SiC-PiN diode in the hybrid pair module are 2380W and 100 W, respectively.


Materials Science Forum | 2006

Optimization of a SiC Super-SBD Based on Scaling Properties of Power Devices

Tetsuo Hatakeyama; Chiharu Ota; Johji Nishio; Takashi Shinohe

Scaling theory is applied in the design of power devices. The scaling law for power devices is presented. A new figure of merit (HFOM) is derived as an invariant of scale transformation, which is a function of avalanche breakdown field and regarded as a measure of the performance of a power device. The optimization of a SiC Schottky barrier diode with the floating junction structure (Super-SBD) has been performed using the HFOM as a measure of the performance. The performance of the optimized Super-SBD surpasses the performance limit of 4H-SiC devices with the conventional structure.


Materials Science Forum | 2014

VF Degradation of 4H-SiC PiN Diodes Using Low-BPD Wafers

Chiharu Ota; Johji Nishio; Kazuto Takao; Takashi Shinohe

In this paper, we found origin of VF degradation of SiC bipolar devices other than a basal plane dislocation (BPD) in the SiC substrate. A VF degradation of the 4H-SiC PiN diodes with low-BPD wafers was evaluated and its origins were discussed. Some diodes suffered VF degradation, even though they were fabricated on BPD-free area. PL mapping, TEM image, and optical observation after KOH etching showed that there were Shockley stacking faults and combined etch-pits arrays, which were presumed to be caused by the device process.

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Hajime Okumura

National Institute of Advanced Industrial Science and Technology

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Hiromichi Ohashi

National Institute of Advanced Industrial Science and Technology

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Shin Ichi Nishizawa

National Institute of Advanced Industrial Science and Technology

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Yasunori Tanaka

National Institute of Advanced Industrial Science and Technology

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Kenji Fukuda

National Institute of Advanced Industrial Science and Technology

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Tomohisa Kato

National Institute of Advanced Industrial Science and Technology

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