Kazuto Takao

Novel exact power loss design method for high output power density converter

Novel exact circuit loss design method has been proposed to design high output power density converters employing a MOSFET and a Schottky Barrier Diode (SBD). The design method is based on a theoretically established minimum circuit loss estimation model for unipolar devices, which takes into account influences of device and circuit stray parameters on the circuit loss. Calculation process of the minimum circuit loss is described. To enhance the accuracy of the calculation data, data-tables of the nonlinear capacitance and transconductance of devices are utilized in the calculation. The data-tables are prepared by using measurement data or simulation data obtained with an exact device simulator. By using this circuit loss design method, exact circuit loss data and optimum circuit parameters to achieve the minimum circuit loss can be obtained.

Development of Ultrahigh-Voltage SiC Devices

Ultrahigh-voltage silicon carbide (SiC) devices [p-i-n diodes and insulated-gate bipolar transistors (IGBTs)] and switching test have been investigated. As a result, we have succeeded in developing a 13-kV p-i-n diode, 15-kV p-channel IGBT, and 16-kV flip-type n-channel implantation and epitaxial IGBT with a low differential specific on-resistance (Rdiff,on). It was revealed that a power module fabricated using a nanotech resin, Si3N4 ceramic substrate, and W base plate was suitable for ultrahigh voltage and high temperature. A switching test was carried out using a clamped inductive load circuit, which indicated that the energy loss of a circuit with ultrahigh-voltage SiC devices is lower than that of Si devices.

GaN Power Transistor Modeling for High-Speed Converter Circuit Design

A circuit simulator has been developed to design power losses of high-frequency power converters using GaN-based heterojunction field-effect transistors (GaN-HFETs). The simulator is based on a high-accuracy equivalent model of GaN-HFETs with peculiar device physics and high-speed loss calculation methods. The simulated power losses were consistent with measured results in dc-dc converters constructed by a GaN-HFET and a SiC Schottky diode with more than 93% accuracy. By utilizing the developed simulator, key requirements in heat-dissipation technologies, circuit parasitic inductances, and gate-drive technologies for next-generation converters are discussed.

Evaluation of a SiC power module using low-on-resistance IEMOSFET and JBS for high power density power converters

In high-power density power converter designs, power losses of power devices are essential design parameters. Silicon-carbide (SiC) power devices are expected as next generation power devices due to their superior performances compared to conventional silicon (Si) power devices. The power loss performances of a SiC power module using SiC Implantation and Epitaxial MOSFET (SiC-IEMOSFET) and Junction barrier controlled Schottky Diode (SiC-JBS) has been evaluated based on parameters of the junction temperature, current density, and switching frequency. The advantage of the SiC power module compared to a latest Si-IGBT and SiC-diode hybrid-pair module are discussed from the view point of the power loss reduction.

Study on advanced power device performance under real circuit conditions with an exact power loss simulator

Power losses of 700V 2.7mOmegacm2 SiC-MOSFETs including influences of circuit stray inductances have been investigated with an originally developed circuit power loss simulator. The device parameters of the SiC-MOSFETs for the power loss calculation are extracted from a SiC-IEMOSFET fabricated at AIST PERC. The power losses of three types of chip areas are investigated and compared to power loss of a CoolMOS. The switching loss energies of the SiC-MOSFETs are larger than that of the CoolMOS in the same circuit conditions. The maximum switching frequencies of the SiC-MOSFETs are 1/2 ~ 2/3 times lower than that of the CoolMOS. Based on total circuit power loss calculation results, heatsink volumes for a half bridge type DC-DC converter at 200kHz operation are estimated. In the case of the SiC- MOSFET3(smallest chip size)/SiC-SBD pair, the heatsink volume can be reduced to about 45% compared to the CoolMOS/SiC-SBD pair due to the Tj=200degC operation and the lower circuit power loss.

Performance evaluation of all SiC power converters for realizing high power density of 50 W/cm 3

In high-power density power converter designs, power losses of power devices are essential design parameters because they determines the volume of cooling systems. The power loss of a SiC power module using a SiC Implantation and Epitaxial MOSFET (SiC-IEMOSFET) has been evaluated in the junction temperature range from 150 °C to 250 °C and the current density range from 100 A/cm2 to 250 A/cm2. By using the power loss data, design criteria of the junction temperature and current density of the SiC-IEMOSFET to realize the power density of 50W/cm3 have been extracted.

3-Level power converter with high-voltage SiC-PiN diode and hard-gate-driving of IEGT for future high-voltage power conversion systems

Reductions in the size and weight of medium-voltage power converters are essential for saving space of power conversion systems and cutting their cost. Volumes of magnetic components such as transformers and LC filters are significant in medium-voltage power converters. High-switching-frequency operation is essential for reducing the volume of magnetic components. In this work, hybrid pairs of 6 kV SiC-PiN diodes and 4.5 kV Si-IEGTs have been applied to realize the high-switching-frequency operation of medium-voltage power converters. For low switching losses and series operation of power devices, a gate-driving technique with an extremely low gate resistance called hard gate driving is employed. Switching characteristics of the hybrid pair are measured experimentally. It has been demonstrated that the total switching loss can be reduced up to 50% with the hybrid pair. In order to demonstrate a 2 kHz switching frequency operation of the hybrid pair, which is about 4 times higher than that of conventional medium-voltage power converters, a 378 kVA prototype 3-level inverter has been designed and constructed.

Accurate Power Circuit Loss Estimation Method for Power Converters With Si-IGBT and SiC-Diode Hybrid Pair

An accurate power circuit loss estimation method has been developed for designing power converters with hybrid pairs of silicon (Si) insulated-gate bipolar transistor (Si-IGBT) and silicon carbide (SiC) Schottky barrier diode/SiC p-i-n diode. An analytical model of the switching losses of the hybrid pairs is proposed to achieve high accuracy and short calculation time. The nonlinearity of the device parameters and the stray inductance in the circuit are considered in the model. For the accurate power loss calculation, an empirical parameter extraction method is introduced for extracting device parameters. The calculated circuit power losses are compared with measurement results, and good agreements are confirmed. By using the proposed method, the power loss of a power converter utilizing 4.5-kV Si-IGBT/SiC-p-i-n-diode hybrid pairs is estimated to investigate the upper limitation of the switching frequency.

Switching characteristic of Si-IEGTs and SiC-PiN diodes pair connected in series

In this paper, in order to realize high voltage static switches of voltage source inverters in high power applications, two series connected 4.5kV rate Si-IEGT with SiC-PiN diode pairs (hybrid combination) are considered with hard switching method. The switching test of power module that is hybrid combination is carried out under 5kV DC bias voltage. The gate driver circuit is designed by high output power capacity for high speed hard switching. Small reverse recovery charge of SiC-PiN diode and the hard switching method are adopted for the purpose of not only high switching frequency but also high power density in the high power converter system. Experimental results show good switching characteristic of voltage balancing with small size capacitor and balance resistors at the switching period.

Equivalent circuit model for GaN-HEMTs in a switching simulation

An equivalent circuit model for gallium nitride-based high electron mobility transistors (GaN-HEMTs) in an exact circuit simulation is proposed. The equivalent circuit contains inherent GaN device properties, such as current-collapse and shot-channel effects. Base on the equivalent model, an power loss simulator was developed. The simulation accuracy was more than 93%. A converter optimum design method is discussed using the power loss simulator.